490
P. Vianco and M. Neilsen
Fig. 16.9 Stereo image of a
PoP component having
underfill in the bottom
(second-level solder joints)
gap and covered by a
conformal coating. The latter
did not bridge the first-level
interconnection gap (orange
arrow)
asymmetries in the residual stresses arising from the mismatch of CTE values, which
may damage to the first- or second- level solder joints. The preferred application
method for PoP and PoPoP components is to spray the coating over the PWA; the
result is a more even layer on all surfaces.
16.2.5.3 Encapsulants
As is the case with conformal coatings, encapsulations are typically used on highreliability PWAs to prevent damage when exposed to shock and vibration environments. There is not a large amount of empirical data, be it performance or reliability,
that considers stack packages on an encapsulated assembly. Although the increased
introduction of PoP and PoPoP components into high-reliability PWAs will certainly
generate such information, it is more likely that design, process and reliability engineers will rely more heavily upon computational modeling to guide encapsulation
technology.
The encapsulation process that is used for a PWA is not expected to depend
explicitly on the presence of stack packages. Nevertheless, there are several factors
that should be addressed to optimize the encapsulation process in order to reduce
any risk to the long-term reliability of the first- or second-level interconnections.
First of all, the higher profiles of PoP and PoPoP components increase the chance
of voids forming next to them due to flow disturbances around the package. These
unfilled volumes can lead to asymmetrical shear and tensile loads being placed on
the stacked package and PCB, which will accelerate the TMF of the solder joints.
Secondly, the need to mitigate residual stresses caused by the curing cycle or
CTE mismatches may require that a compliant or “slush” layer be placed over the
component prior to applying the encapsulant. Polysulfide layers are often used to
fulfill this role; however, as a pseudo-conformal coating, flow behavior into the gaps
must be fully characterized as well as any impacts to solder joint reliability. The best
P. Vianco and M. Neilsen
Fig. 16.9 Stereo image of a
PoP component having
underfill in the bottom
(second-level solder joints)
gap and covered by a
conformal coating. The latter
did not bridge the first-level
interconnection gap (orange
arrow)
asymmetries in the residual stresses arising from the mismatch of CTE values, which
may damage to the first- or second- level solder joints. The preferred application
method for PoP and PoPoP components is to spray the coating over the PWA; the
result is a more even layer on all surfaces.
16.2.5.3 Encapsulants
As is the case with conformal coatings, encapsulations are typically used on highreliability PWAs to prevent damage when exposed to shock and vibration environments. There is not a large amount of empirical data, be it performance or reliability,
that considers stack packages on an encapsulated assembly. Although the increased
introduction of PoP and PoPoP components into high-reliability PWAs will certainly
generate such information, it is more likely that design, process and reliability engineers will rely more heavily upon computational modeling to guide encapsulation
technology.
The encapsulation process that is used for a PWA is not expected to depend
explicitly on the presence of stack packages. Nevertheless, there are several factors
that should be addressed to optimize the encapsulation process in order to reduce
any risk to the long-term reliability of the first- or second-level interconnections.
First of all, the higher profiles of PoP and PoPoP components increase the chance
of voids forming next to them due to flow disturbances around the package. These
unfilled volumes can lead to asymmetrical shear and tensile loads being placed on
the stacked package and PCB, which will accelerate the TMF of the solder joints.
Secondly, the need to mitigate residual stresses caused by the curing cycle or
CTE mismatches may require that a compliant or “slush” layer be placed over the
component prior to applying the encapsulant. Polysulfide layers are often used to
fulfill this role; however, as a pseudo-conformal coating, flow behavior into the gaps
must be fully characterized as well as any impacts to solder joint reliability. The best