416
S. Shi et al.
However, it is worth of mentioning some limitations of LCP material. The material is relatively new and lacks of industrial use database. It is dissolvable in base
solution at slightly evaluated temperature and has poor thermal conductivity. The
surface roughness is as high as microns in its natural form. LCP requires polishing
to reduce its surface roughness [12]. Thorough testing is recommended in applying
this material for substrate applications.
14.3.5 PTH and via Filling Materials
There are multiple purposes of filling PTH and via holes. For high density package
applications, filled via enables stacked via and via-in-pad designs, which significantly
reduces wasted area for routing wires and sometimes reduces required build-up layer
counts. Filled via can eliminate the concern of plating acid residuals, therefore eliminating the concern of acid corrosion to the plated copper in the via hole. Other
benefits of filled via include avoiding flux or solder paste blowout during packaging
assembly, keeping solder mask ink from migrating into through holes during screen
printing, maintaining better printed solder paste volume for via-in-pad design, and
enhancing the solder mask planarity. For PTH or through hole vias, filling can prevent
vacuum-loss caused mishandling during substrate build up and flux or underfill dripping through the holes during subsequent assembly processes. Filled vias and PTHs
are also required for the high power HDI substrate applications.
PTH and via filling materials can be resin-based or pure copper. Resin based materials include B-staged resin coated copper (RCC) laminate, filled non-conductive
resins, silver and copper filled resins, photoimageable dielectrics, and solder mask
ink. Most of these resins are epoxy, epoxy/BT resin, cyanate ester resin, and epoxy
acrylic resins. Via filling with B-staged resin laminates is done by laminating the
layer over via holes, where the liquid resin under elevated temperature and pressure flows into via holes and fills them. Although the insulation displacement via
formation process is used for some applications, other type of filled resin systems are
mainly processed using screen printing since they are in liquid or paste form. Therefore, they need to be easily printable and planarizable. All the filling materials must
have good adhesion to plated copper inside vias and PTHs. Since solder mask ink
contains solvent, the process stability is impacted by the vaporization of the solvent
and film shrinkage. If the via diameter is small, the surface tension may result in
solvent residues near the via openings. The adhesion strength of cured solder mask
ink to copper is usually not as good as other via filling materials.
Copper filled vias can be made by different ways. One way is called copper pillar
technology, similar to insulation displacement via formation technology, but the resin
bump is now substituted by a copper pillar. Leveling is typically required after the
dielectric layer is applied. Another method is so-called every layer inter-connection
(ELIC) by NCAB Group or Any Layer Inner Via Hole (ALIVH) where laser drilled
via holes are completely plated by copper followed by copper thickness reduction
S. Shi et al.
However, it is worth of mentioning some limitations of LCP material. The material is relatively new and lacks of industrial use database. It is dissolvable in base
solution at slightly evaluated temperature and has poor thermal conductivity. The
surface roughness is as high as microns in its natural form. LCP requires polishing
to reduce its surface roughness [12]. Thorough testing is recommended in applying
this material for substrate applications.
14.3.5 PTH and via Filling Materials
There are multiple purposes of filling PTH and via holes. For high density package
applications, filled via enables stacked via and via-in-pad designs, which significantly
reduces wasted area for routing wires and sometimes reduces required build-up layer
counts. Filled via can eliminate the concern of plating acid residuals, therefore eliminating the concern of acid corrosion to the plated copper in the via hole. Other
benefits of filled via include avoiding flux or solder paste blowout during packaging
assembly, keeping solder mask ink from migrating into through holes during screen
printing, maintaining better printed solder paste volume for via-in-pad design, and
enhancing the solder mask planarity. For PTH or through hole vias, filling can prevent
vacuum-loss caused mishandling during substrate build up and flux or underfill dripping through the holes during subsequent assembly processes. Filled vias and PTHs
are also required for the high power HDI substrate applications.
PTH and via filling materials can be resin-based or pure copper. Resin based materials include B-staged resin coated copper (RCC) laminate, filled non-conductive
resins, silver and copper filled resins, photoimageable dielectrics, and solder mask
ink. Most of these resins are epoxy, epoxy/BT resin, cyanate ester resin, and epoxy
acrylic resins. Via filling with B-staged resin laminates is done by laminating the
layer over via holes, where the liquid resin under elevated temperature and pressure flows into via holes and fills them. Although the insulation displacement via
formation process is used for some applications, other type of filled resin systems are
mainly processed using screen printing since they are in liquid or paste form. Therefore, they need to be easily printable and planarizable. All the filling materials must
have good adhesion to plated copper inside vias and PTHs. Since solder mask ink
contains solvent, the process stability is impacted by the vaporization of the solvent
and film shrinkage. If the via diameter is small, the surface tension may result in
solvent residues near the via openings. The adhesion strength of cured solder mask
ink to copper is usually not as good as other via filling materials.
Copper filled vias can be made by different ways. One way is called copper pillar
technology, similar to insulation displacement via formation technology, but the resin
bump is now substituted by a copper pillar. Leveling is typically required after the
dielectric layer is applied. Another method is so-called every layer inter-connection
(ELIC) by NCAB Group or Any Layer Inner Via Hole (ALIVH) where laser drilled
via holes are completely plated by copper followed by copper thickness reduction