7 SETI Program at the Medicina INAF Radioastronomy …
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Unit manages not just a single Arithmetic and Logic Unit (ALU) but tens or hundreds
of them all executing the same instruction on different data of the same array. The
space saved on the die by using a simple CU was used to implement a high number of
ALU. Actual Nvidia GPUs have thousands of core, managed by tens on CUs named
Streaming Multiprocessors (SMs) [8].
Intel Xeon Phi system derived from a failed project of a high-performance GPU.
They can be considered a hybrid between a multi-core CPU and a GPU because it
has similarities with both. Each Xeon Phi integrated into the same chip tens of cores
much straightforward than the ones of contemporary Intel CPUs but equipped with
computing units dedicated to Single Instruction Multiple Data (SIMD) operations
[9].
The use of many-core architectures was boosted with the porting of many standard
numerical libraries (such as those used for linear algebra or FFT) by rewriting the
original code entirely. The architecture was modified to take advantage of many-core
hardware capabilities to make easy and speed-up the porting of old applications on
the newly available accelerators. These libraries guarantee a considerable increase in
computing performance of some algorithms (especially in those which by their nature
are more easily paralleled—e.g., the FFT) with minimal changes to the original code
[10, 11].
The FPGAs are digital integrated circuits that are designed to be configured by
a customer after manufacturing—hence the term “field-programmable” [12]. They
are composed of an array of blocks containing both combinatorial logic and some
memory in the form of flip-flops. Each block is connected to others by a network of
interconnections that can be changed programming a set of switches. So by programming the combinatorial logic and the flip flops connections of each block together
with the set of network switches, it is possible to implement fast and straightforward digital circuits but also complete microprocessors. Many FPGAs can be reprogrammed (reconfigured) each time they are powered on letting to implement each
time a different digital application.
FPGAs let the users have a very flexible digital circuit with almost the performance
of an Application Specific Integrated Circuit (ASIC) but more comfortable to set up.
It is very cheap to implement for mass productions under 10 k units because it doesn’t
need to deal with the typical problem of silicon foundry projects.
Starting from the 2000s were introduced on the market advanced FPGAs that
also included in the same chip CPUs, Static and Dynamic Random Access Memory
(SRAM–DRAM), DSP units, and other dedicated and optimized logic blocks.
A typical use of FPGAs is glue logic (a custom chip installed between standard
chips with different data exchanging standard to let them communicate) or custom
logic for low production high demanding applications. They are widely used in
research fields with projects were data rates and processing need the state of the art
of technology. In the last years, FPGAs programming was made easier year by year:
although programming via functional blocks and Hardware Description Language
(HDL) languages (e.g., Verilog and VHDL), it is always possible. Today it is also
possible to use high-level languages suitably modified with appropriate libraries and
extensions like OpenCL [13, 14]. So many FPGA manufacturers like Intel and Xilinx
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