434
J. Wu et al.
increasing amount of noise as shown in our experiments. Multi-condition training,
whereby the model is trained with noise-corrupted sound samples, is shown to overcome this challenge effectively. In contrast to the DNN and SVM classifiers [30],
there is no trade-off in performance for clean sounds in the SOM-SNN framework
with multi-condition training; probably because the classification decision is made
based on local temporal patterns. Additionally, noise is also known to exist in the
central nervous system [55, 56] which can be simulated by spike jittering and deletion. Notably, the SOM-SNN framework is shown to be highly robust to such noises
introduced to spike inputs arriving at the SNN classifier.
4.2 SOM-SNN Framework with Non-volatile Memory
Recent research of novel nanoscale materials with non-volatile properties opens up
a compelling avenue for emulating the synaptic plasticity and state-holding properties that appeared in the real biological synapses and neurons[11, 57]. Comparing with NVM-free CMOS Neuromorphic implementations, the crossbar array of
NVM devices offer high device density, low-power consumption and efficient signal integration. These novel NVM devices, therefore, would boost the algorithm
development and enable the deployment of data-centric applications onto pervasive
low-power wearable and Internet-of-Things devices [10].
The computational cost and memory bandwidth requirements of the proposed
framework would be key concerns for neuromorphic system implementation. For
the auditory front-end, our implementation is similar to that of the MFCC. As evaluated in [42], the MFCC implementation is computationally more costly compared
to the spike trains generated directly from the neuromorphic cochlea sensor. Our
recent work [58] proposes a novel time-domain frequency filtering scheme which
addresses the cost issue in MFCC implementation. Hence, we expect the SOM to
be the main computational bottleneck of the proposed framework. Nevertheless, the
parallel matrix multiplication operations demanded by the SOM can be effectively
implemented with arrays of analog resistive memory devices, whereby multiplication operations are naturally performed at every crosspoint following the Ohm’s law.
Hence, such parallel and in-memory analog computation offered by resistive memory
devices demonstrate drastic time and energy saving for loading data and computation
against high-performance GPUs implementations[10, 59].
The recently introduced spiking-SOM implementations [60, 61] support online
training and real-time adaptation, whereby the winner neuron spikes the earliest
and inhibits all other neurons from firing (i.e., a winner-takes-all mechanism) and
hence by construction, the BMU. Notably, NVM devices adapt their conductance
depending on the history of electrical stimuli applied, making them particularly
suitable to emulate the biologically plausible local spike-time-dependent-plasticity
(STDP) learning rules used in those works. The spiking-SOM also facilitates the
implementation of the whole framework on neuromorphic hardware. In tandem with
J. Wu et al.
increasing amount of noise as shown in our experiments. Multi-condition training,
whereby the model is trained with noise-corrupted sound samples, is shown to overcome this challenge effectively. In contrast to the DNN and SVM classifiers [30],
there is no trade-off in performance for clean sounds in the SOM-SNN framework
with multi-condition training; probably because the classification decision is made
based on local temporal patterns. Additionally, noise is also known to exist in the
central nervous system [55, 56] which can be simulated by spike jittering and deletion. Notably, the SOM-SNN framework is shown to be highly robust to such noises
introduced to spike inputs arriving at the SNN classifier.
4.2 SOM-SNN Framework with Non-volatile Memory
Recent research of novel nanoscale materials with non-volatile properties opens up
a compelling avenue for emulating the synaptic plasticity and state-holding properties that appeared in the real biological synapses and neurons[11, 57]. Comparing with NVM-free CMOS Neuromorphic implementations, the crossbar array of
NVM devices offer high device density, low-power consumption and efficient signal integration. These novel NVM devices, therefore, would boost the algorithm
development and enable the deployment of data-centric applications onto pervasive
low-power wearable and Internet-of-Things devices [10].
The computational cost and memory bandwidth requirements of the proposed
framework would be key concerns for neuromorphic system implementation. For
the auditory front-end, our implementation is similar to that of the MFCC. As evaluated in [42], the MFCC implementation is computationally more costly compared
to the spike trains generated directly from the neuromorphic cochlea sensor. Our
recent work [58] proposes a novel time-domain frequency filtering scheme which
addresses the cost issue in MFCC implementation. Hence, we expect the SOM to
be the main computational bottleneck of the proposed framework. Nevertheless, the
parallel matrix multiplication operations demanded by the SOM can be effectively
implemented with arrays of analog resistive memory devices, whereby multiplication operations are naturally performed at every crosspoint following the Ohm’s law.
Hence, such parallel and in-memory analog computation offered by resistive memory
devices demonstrate drastic time and energy saving for loading data and computation
against high-performance GPUs implementations[10, 59].
The recently introduced spiking-SOM implementations [60, 61] support online
training and real-time adaptation, whereby the winner neuron spikes the earliest
and inhibits all other neurons from firing (i.e., a winner-takes-all mechanism) and
hence by construction, the BMU. Notably, NVM devices adapt their conductance
depending on the history of electrical stimuli applied, making them particularly
suitable to emulate the biologically plausible local spike-time-dependent-plasticity
(STDP) learning rules used in those works. The spiking-SOM also facilitates the
implementation of the whole framework on neuromorphic hardware. In tandem with