RRAM-Based Neuromorphic Computing Systems
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Fig. 10 Block diagram of a neuron in a SNN: implemented in blocks as shown, namely, the synapse
and the neuron. This figure is adapted from [4]
mechanisms. The synapse is the connection between the axon of a pre-synaptic
neuron and the dendrite of a post-synaptic neuron. A neuron integrates the incoming
spikes received through its dendrites and may then emit a spike in the event of
threshold crossing through its axon to its post-synaptic neurons. Figure 10b shows a
block diagram representation of the biological model as in Fig. 10a. The synapse is
a storage element with input spikes and output current. Neuron computation is done
using an integrator and a comparator. The integrator accumulates the input currents
in terms of potential difference, which emulates the membrane potential in biological
neurons. The comparator then checks if the membrane potential crosses the voltage
threshold; a spike is emitted if crossed and the membrane potential is then reset to
its baseline value.
b. Conversion of DNN to Spiking Deep Neural Network (SDNN)
In a conventional CPU or GPU, it requires more time and energy to run a SDNN,
whereas the power consumption and computational latency in neuromorphic analog
or digital dedicated hardwares [85–87] are orders of magnitude less. The substantial
computational cost incurred during training and inference in a deep network for real
world practical applications has created a need for specialized hardware acceleration
and a new computational paradigm [88]. One emerging approach is to convert the
pre-trained DNN into SNN (while retaining its parameters) so that it can be mapped
directly onto a neuromorphic hardware with little performance loss.
The spike-based computation in the SNN consumes much less power compared
to the high precision digital computation in the DNN. DNN has better classification
accuracy compared to SNN. Hence, mapping a deep CNN to a SDNN potentially
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