554
21 Diodes
Fig. 21.38 a Schematic
band diagram of an
Al/SiO 2 /Si (n-type) diode
with 50 nm oxide thickness
and N D = 10 16 cm −3 for
zero bias, W ms = 0.25eV.
Based on data from [1759].
b Difference of work
functions φ ms = −W ms /e
for SiO 2 /Si MIS diodes and
various doping levels and
electrode materials (Al, Au
and polycrystalline Si).
The square represents the
situation depicted in panel
(a). Based on data
from [1760]
(a)
(b)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
10
14
10
15
10
16
10
17
10
18
N (cm )
B
-3
ms (V)
A u/ n- S i
A u/ p- S i
A l/n -S i
A l/p -S i
p po ly -S i/n -S i
+
p p o ly -S i/p -S i
+
n po ly -S i/n -S i
+
n p o ly -S i/p -S i
+
Fig. 21.39 Schematic fabrication technologies for bipolar diodes: a Planar junction with local impurity incorporation
(diffusion from gas phase or ion implantation) through mask and contact metallization, b epitaxial junction
(Sect. 21.5.8). If the differently doped regions belong to different semiconductor materials, the diode
is a heterostructure pn diode (Sect. 21.4.6). Various schemes have been used to fabricate pn diodes
(Fig. 21.39).
21.4.1 Band Diagram
If the doping profile is arbitrarily sharp, the junction is called abrupt. This geometry is the case
for epitaxial pn junctions where the differently doped layers are grown on top of each other.
21 For
21 The choices of dopants and the growth conditions, in particular the temperature, need to be made such that no or
negligible interdiffusion of the dopants takes place.
21 Diodes
Fig. 21.38 a Schematic
band diagram of an
Al/SiO 2 /Si (n-type) diode
with 50 nm oxide thickness
and N D = 10 16 cm −3 for
zero bias, W ms = 0.25eV.
Based on data from [1759].
b Difference of work
functions φ ms = −W ms /e
for SiO 2 /Si MIS diodes and
various doping levels and
electrode materials (Al, Au
and polycrystalline Si).
The square represents the
situation depicted in panel
(a). Based on data
from [1760]
(a)
(b)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
10
14
10
15
10
16
10
17
10
18
N (cm )
B
-3
ms (V)
A u/ n- S i
A u/ p- S i
A l/n -S i
A l/p -S i
p po ly -S i/n -S i
+
p p o ly -S i/p -S i
+
n po ly -S i/n -S i
+
n p o ly -S i/p -S i
+
Fig. 21.39 Schematic fabrication technologies for bipolar diodes: a Planar junction with local impurity incorporation
(diffusion from gas phase or ion implantation) through mask and contact metallization, b epitaxial junction
(Sect. 21.5.8). If the differently doped regions belong to different semiconductor materials, the diode
is a heterostructure pn diode (Sect. 21.4.6). Various schemes have been used to fabricate pn diodes
(Fig. 21.39).
21.4.1 Band Diagram
If the doping profile is arbitrarily sharp, the junction is called abrupt. This geometry is the case
for epitaxial pn junctions where the differently doped layers are grown on top of each other.
21 For
21 The choices of dopants and the growth conditions, in particular the temperature, need to be made such that no or
negligible interdiffusion of the dopants takes place.