120
4 Verification and Testing
4.3.4 Irradiation Tests
Irradiation tests have been carried out to characterize the SEE behaviour of both the
process, the IP memories, and the SAMPA design and to verify if the design can
withstand the ALICE TPC and MCH operational environment and behave normally.
Complete results from these tests can be found in [5, 30], only a brief summary will
be given here. Initial characterization tests of the process and memories for SEUs
showed a cross section on par with what is expected for a 130 nm process [5]. The
full device also operated predictably and data could be acquired. The testing showed
frequent abnormally high current increases of the device, which would disappear
once the power was cycled. This behaviour is an indicator of SEL in the design.
Irradiation tests had previously been performed on the first prototype of the design
where no SELs were observed [30]. The primary change between the first and the
second prototype is the inclusion of the memory blocks. Even though the design
contains many memories of different sizes, they are all based either on an IP of a
single port version or a dual port version, which both have different layouts. For the
second irradiation test, the beam was collimated so that it points to either the dual
port memory or the single port memory. Results showed a significant higher rate of
current increases when irradiating the single port memory. So for the third version
of the design, the single port memory was replaced by a dual port memory with one
disabled port. Following irradiation-tests indicated that this was a success [5].
The current channel baseline value, as calculated by the BC2 and BC3 filter, is
available from the configuration registers of the SAMPA. From monitoring the configuration register during the irradiation testing it was found that calculated baseline
for the BC2 sometimes changed permanently to another value. As no signal is present
on the analogue inputs during irradiation, the calculated baseline value should remain
constant as could be seen in the calculated baseline from the BC3. The BC2 is a moving average filter and calculates a new baseline as baseline =
sum − old val + new val
f ilter length
where neither the sum or the new and old values are TMR protected. A bit-flip in the
sum register would cause the behaviour experienced in the irradiation testing. The
simple fix would be to TMR protect the sum register. Another option would be to
employ a direct sum calculation instead of a cumulative sum, but as this would add
additional adders and multiplexers the space saving compared to using TMR might
not be as huge. However, none of these fixes are included in the v3/v4 versions, as
these irradiation results were only available after design submission. A workaround
for the issue is to employ the auto-reset feature implemented for the SAMPA, which
will reset the baseline if the signal stays outside the threshold for longer than a
predetermined time.
4 Verification and Testing
4.3.4 Irradiation Tests
Irradiation tests have been carried out to characterize the SEE behaviour of both the
process, the IP memories, and the SAMPA design and to verify if the design can
withstand the ALICE TPC and MCH operational environment and behave normally.
Complete results from these tests can be found in [5, 30], only a brief summary will
be given here. Initial characterization tests of the process and memories for SEUs
showed a cross section on par with what is expected for a 130 nm process [5]. The
full device also operated predictably and data could be acquired. The testing showed
frequent abnormally high current increases of the device, which would disappear
once the power was cycled. This behaviour is an indicator of SEL in the design.
Irradiation tests had previously been performed on the first prototype of the design
where no SELs were observed [30]. The primary change between the first and the
second prototype is the inclusion of the memory blocks. Even though the design
contains many memories of different sizes, they are all based either on an IP of a
single port version or a dual port version, which both have different layouts. For the
second irradiation test, the beam was collimated so that it points to either the dual
port memory or the single port memory. Results showed a significant higher rate of
current increases when irradiating the single port memory. So for the third version
of the design, the single port memory was replaced by a dual port memory with one
disabled port. Following irradiation-tests indicated that this was a success [5].
The current channel baseline value, as calculated by the BC2 and BC3 filter, is
available from the configuration registers of the SAMPA. From monitoring the configuration register during the irradiation testing it was found that calculated baseline
for the BC2 sometimes changed permanently to another value. As no signal is present
on the analogue inputs during irradiation, the calculated baseline value should remain
constant as could be seen in the calculated baseline from the BC3. The BC2 is a moving average filter and calculates a new baseline as baseline =
sum − old val + new val
f ilter length
where neither the sum or the new and old values are TMR protected. A bit-flip in the
sum register would cause the behaviour experienced in the irradiation testing. The
simple fix would be to TMR protect the sum register. Another option would be to
employ a direct sum calculation instead of a cumulative sum, but as this would add
additional adders and multiplexers the space saving compared to using TMR might
not be as huge. However, none of these fixes are included in the v3/v4 versions, as
these irradiation results were only available after design submission. A workaround
for the issue is to employ the auto-reset feature implemented for the SAMPA, which
will reset the baseline if the signal stays outside the threshold for longer than a
predetermined time.