7.8 Methods for Controlling Safety …
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7.8.4 Active Hardware Measurements of Microcircuits
Before discussing active hardware metering methods, it should be noted that they not
only identify each separate chip in a unique and uncloneable way, but also provide
the possibility to create an effective mechanism for control, tracking, interlock, and
release of modern critical microcircuits. In order to ensure the required level of nonreproducibility, active metering has been lately using forms of uncloneable digital IC
identifiers, such as weak PUFs mentioned above [136]. One of the first of such organizational and methodical documents regulating the metering process was official
provision of access to the IC for developers.
Figure 7.26 shows the diagram of the first active hardware metering method known
from literary sources, which was used to solve the technical problems described in
[97]. A similar process of providing access to the IC was later adapted for both
internal and external active hardware metering of integrated circuits. In this, two main
economic subjects are usually involved: (1) a microcircuit design center (developer),
which is the holder of IP rights for industrial IC manufacturing, and (2) a semiconductor production plant (a manufacturer or a fab), which manufactures IC designs
developed by the center.
In a very brief summary, the main stages of this process look as follows. IC
developers use a high logic level of description of their designs to identify the best
possible (optimal) points for installation of the so-called interlock. Subsequent standard phases of microcircuit design (such as RTL level, logic synthesis, data transformation, tracing of interconnects, topology design, and arrangement of package
pins) follow their traditional routes. As a result, the fab will receive detailed documentation for the chip in the form of so-called OASIS files (or GDSII) together with
other technical information required for production of chips, including full sets of
vectors of test effects for IC output functional control. The design center usually
pays the fab certain advance payments for production of masks from the transferred
OASIS files, which will be ultimately used in lithography processes, as well as for the
necessary quantity of defect-free ICs manufactured using this method. Each separate IC usually contains an uncloneable digital identification units, e.g., weak PUFs
mentioned above many times.
Production of a set of masks today is an expensive and complex process that
usually involves many precision operations, which shall be controlled very carefully
[132, 137]. When a foundry performs these complex lithographic operations with
masks, it is necessary to understand that these masks will be subsequently used to
produce a variety of chips. Due to the fact that responses (signatures) of specific
PUFs are integrated into interlock modules on these microcircuit chips, each such IC
during production will be uniquely locked (in other words, it simply will not operate
without specific permission from the outside). According to the method implementation protocol, the manufacturer scans information of the unique identifier mentioned
above from each IC during the initial testing phase and sends the scanning contents
back to the design center. The design center, which uses its own database specific for
reach developer or a specific confidential cryptographic protocol, is the only technical
717
7.8.4 Active Hardware Measurements of Microcircuits
Before discussing active hardware metering methods, it should be noted that they not
only identify each separate chip in a unique and uncloneable way, but also provide
the possibility to create an effective mechanism for control, tracking, interlock, and
release of modern critical microcircuits. In order to ensure the required level of nonreproducibility, active metering has been lately using forms of uncloneable digital IC
identifiers, such as weak PUFs mentioned above [136]. One of the first of such organizational and methodical documents regulating the metering process was official
provision of access to the IC for developers.
Figure 7.26 shows the diagram of the first active hardware metering method known
from literary sources, which was used to solve the technical problems described in
[97]. A similar process of providing access to the IC was later adapted for both
internal and external active hardware metering of integrated circuits. In this, two main
economic subjects are usually involved: (1) a microcircuit design center (developer),
which is the holder of IP rights for industrial IC manufacturing, and (2) a semiconductor production plant (a manufacturer or a fab), which manufactures IC designs
developed by the center.
In a very brief summary, the main stages of this process look as follows. IC
developers use a high logic level of description of their designs to identify the best
possible (optimal) points for installation of the so-called interlock. Subsequent standard phases of microcircuit design (such as RTL level, logic synthesis, data transformation, tracing of interconnects, topology design, and arrangement of package
pins) follow their traditional routes. As a result, the fab will receive detailed documentation for the chip in the form of so-called OASIS files (or GDSII) together with
other technical information required for production of chips, including full sets of
vectors of test effects for IC output functional control. The design center usually
pays the fab certain advance payments for production of masks from the transferred
OASIS files, which will be ultimately used in lithography processes, as well as for the
necessary quantity of defect-free ICs manufactured using this method. Each separate IC usually contains an uncloneable digital identification units, e.g., weak PUFs
mentioned above many times.
Production of a set of masks today is an expensive and complex process that
usually involves many precision operations, which shall be controlled very carefully
[132, 137]. When a foundry performs these complex lithographic operations with
masks, it is necessary to understand that these masks will be subsequently used to
produce a variety of chips. Due to the fact that responses (signatures) of specific
PUFs are integrated into interlock modules on these microcircuit chips, each such IC
during production will be uniquely locked (in other words, it simply will not operate
without specific permission from the outside). According to the method implementation protocol, the manufacturer scans information of the unique identifier mentioned
above from each IC during the initial testing phase and sends the scanning contents
back to the design center. The design center, which uses its own database specific for
reach developer or a specific confidential cryptographic protocol, is the only technical