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7 Countermeasures Against Hardware Trojans
FPGAs. Decryption of the bitstream does not ensure protection from penetration
of hardware Trojans into the circuit design through third-party IP blocks.
For the purpose of the verification of the designed project, the authors suggest
introducing configurable logic blocks (CLB) in the FPGA based on error correction
code (ECC) forming the parity check code. Such parity check of each CLB elements
makes it possible to quickly identify all unauthorized changes implemented in the
project. Two-step randomization is usually used to form a standard parity bit, but
even it does not ensure the predictability of the CLB result.
The work [19] examines a technical solution of protection from hardware Trojans,
which is implemented during the IC production phase. If reconfigurable logic blocks
are placed between critical elements of the IC topology, the specialists will see
certain reconfigurable architecture in certain separate chip regions during the IC
manufacturing stage. These blocks referred to as barriers by the authors can be
specially programmed using a secret key, which can ultimately result in unlocking of
the entire project and its logical completion. If the location and functional possibilities
of these barriers are selected properly, any embedded hardware Trojans will be fairly
hard to activate, and their influence on the IC functioning can be locked. By combining
hard and soft logic, it is possible to develop unique solutions to counter any types
of hardware Trojans. At the same time, reconfigurable logic can be also used for
implementation of local protection mechanisms.
The use of reconfigurable logic as a means of protection from hardware implants
sets new tasks for improvements of design and verification methods and shifts the
main focus in terms of protection from foundry to the RTL project. This is because
in order to implement an effective hardware implant (hardware Trojan) on the IC
level, the intruder only needs to ensure interconnection between the manufacturer
and supplier of the tools used during the design phase. Implementation of any modern
complex logic project, as a rule, is based on using several IP blocks. The authors of
[20] suggested an original idea of ditches and draw bridges as insulation primitives
applied if several IP blocks are used in a single IC. These bridges also help to block
any illegal branches or interconnects inside reconfigurable blocks of the microcircuit.
Let us list here some other methods of application of the reconfigurable logic
principles that can be used to counter hardware Trojans in microcircuits:
• dynamic reprogramming of logic blocks [21];
• encryption of the transmitted data [18];
• replication and lock-stepping of the logic [22];
• using functionally identical logic blocks with different architectures in the IC
[23];
• generation of hardware twin modules using random numbers [24].
7 Countermeasures Against Hardware Trojans
FPGAs. Decryption of the bitstream does not ensure protection from penetration
of hardware Trojans into the circuit design through third-party IP blocks.
For the purpose of the verification of the designed project, the authors suggest
introducing configurable logic blocks (CLB) in the FPGA based on error correction
code (ECC) forming the parity check code. Such parity check of each CLB elements
makes it possible to quickly identify all unauthorized changes implemented in the
project. Two-step randomization is usually used to form a standard parity bit, but
even it does not ensure the predictability of the CLB result.
The work [19] examines a technical solution of protection from hardware Trojans,
which is implemented during the IC production phase. If reconfigurable logic blocks
are placed between critical elements of the IC topology, the specialists will see
certain reconfigurable architecture in certain separate chip regions during the IC
manufacturing stage. These blocks referred to as barriers by the authors can be
specially programmed using a secret key, which can ultimately result in unlocking of
the entire project and its logical completion. If the location and functional possibilities
of these barriers are selected properly, any embedded hardware Trojans will be fairly
hard to activate, and their influence on the IC functioning can be locked. By combining
hard and soft logic, it is possible to develop unique solutions to counter any types
of hardware Trojans. At the same time, reconfigurable logic can be also used for
implementation of local protection mechanisms.
The use of reconfigurable logic as a means of protection from hardware implants
sets new tasks for improvements of design and verification methods and shifts the
main focus in terms of protection from foundry to the RTL project. This is because
in order to implement an effective hardware implant (hardware Trojan) on the IC
level, the intruder only needs to ensure interconnection between the manufacturer
and supplier of the tools used during the design phase. Implementation of any modern
complex logic project, as a rule, is based on using several IP blocks. The authors of
[20] suggested an original idea of ditches and draw bridges as insulation primitives
applied if several IP blocks are used in a single IC. These bridges also help to block
any illegal branches or interconnects inside reconfigurable blocks of the microcircuit.
Let us list here some other methods of application of the reconfigurable logic
principles that can be used to counter hardware Trojans in microcircuits:
• dynamic reprogramming of logic blocks [21];
• encryption of the transmitted data [18];
• replication and lock-stepping of the logic [22];
• using functionally identical logic blocks with different architectures in the IC
[23];
• generation of hardware twin modules using random numbers [24].