6.3 Basics of Reverse-Engineering Art
539
of electron reflection from a non-planar surface, SEM requires the dielectric to be
removed.
6.3.2.6 Image Acquisition
Modern laboratories specialized in reverse engineering currently use two main types
of images: optical and SEM images. Up to the level of 0.25 μm generation of semiconductor devices, optical images were sufficient. However, for technologies of 0.18 μm
and less, optical images are already unable to resolve smaller critical characteristics;
therefore, SEM shall be used in any case (Fig. 6.20).
IC sizes and large increases needed for the most advanced design standards now
mean that manual image generation is no longer a feasible method. Image acquisition
systems are now required to use automated stations of step-by-step exposure integrated with the microscope. Modern two-coordinate stations of step-by-step exposure allow the expert to set the photographing process in the evening and acquire
the complete image of the analyzed layer upon returning to the workplace in the
morning.
Modern RE companies also use specifically designed software to stitch together
thousands of separate photos (frames) of each layer with minimum spatial error.
After that, additional programs are required to coordinate stitching of many layers to
avoid actual misalignment between separate layers. Contacts and interlayer openings
shall be aligned with upper and lower layers in order to ensure processing for final
extraction of the IC electrical circuit.
Circuit Annotation
After all the photos (images) have been stitched together and aligned, the actual
process of reverse engineering of the circuit begins. Extraction of the complete circuit
requires consideration of all transistors, capacitors, diodes, and other components,
all layers of interconnects and all contacts and vias. This can be done manually or
automatically.
Today, there are several effective special software tools to help complete this
process, including Chipworks’ ICWorks Extractor program. This program is used to
view all layers of the chip image both individually and combined with each other.
In another mode, it allows the user to view several chip layers in several windows at
the same time (Fig. 6.21). Each window shows the same two-dimensional region in
each layer. The rigid cursor helps the engineer clearly see what lies above or below
the examined point of interest on one layer.
The extraction engineer can then use this program for annotation and numeration of all connection buses and devices in this region of interest (Fig. 6.22). It is
also possible to use a special program to recognize and process 2D and 3D images
(Fig. 6.23); alternatively, an experienced engineer can do this work manually. After
that, it is possible to use a program for recognition of digital images in order to
identify standard cells in digital logic. This can significantly aid extraction of large
blocks of standard cells.
539
of electron reflection from a non-planar surface, SEM requires the dielectric to be
removed.
6.3.2.6 Image Acquisition
Modern laboratories specialized in reverse engineering currently use two main types
of images: optical and SEM images. Up to the level of 0.25 μm generation of semiconductor devices, optical images were sufficient. However, for technologies of 0.18 μm
and less, optical images are already unable to resolve smaller critical characteristics;
therefore, SEM shall be used in any case (Fig. 6.20).
IC sizes and large increases needed for the most advanced design standards now
mean that manual image generation is no longer a feasible method. Image acquisition
systems are now required to use automated stations of step-by-step exposure integrated with the microscope. Modern two-coordinate stations of step-by-step exposure allow the expert to set the photographing process in the evening and acquire
the complete image of the analyzed layer upon returning to the workplace in the
morning.
Modern RE companies also use specifically designed software to stitch together
thousands of separate photos (frames) of each layer with minimum spatial error.
After that, additional programs are required to coordinate stitching of many layers to
avoid actual misalignment between separate layers. Contacts and interlayer openings
shall be aligned with upper and lower layers in order to ensure processing for final
extraction of the IC electrical circuit.
Circuit Annotation
After all the photos (images) have been stitched together and aligned, the actual
process of reverse engineering of the circuit begins. Extraction of the complete circuit
requires consideration of all transistors, capacitors, diodes, and other components,
all layers of interconnects and all contacts and vias. This can be done manually or
automatically.
Today, there are several effective special software tools to help complete this
process, including Chipworks’ ICWorks Extractor program. This program is used to
view all layers of the chip image both individually and combined with each other.
In another mode, it allows the user to view several chip layers in several windows at
the same time (Fig. 6.21). Each window shows the same two-dimensional region in
each layer. The rigid cursor helps the engineer clearly see what lies above or below
the examined point of interest on one layer.
The extraction engineer can then use this program for annotation and numeration of all connection buses and devices in this region of interest (Fig. 6.22). It is
also possible to use a special program to recognize and process 2D and 3D images
(Fig. 6.23); alternatively, an experienced engineer can do this work manually. After
that, it is possible to use a program for recognition of digital images in order to
identify standard cells in digital logic. This can significantly aid extraction of large
blocks of standard cells.