194
H. Riener et al.
17. Linke, N.M., Maslov, D., Rötteler, M., Debnath, S., Figgatt, C., Landsman, K.A., Wright,
K., Monroe, C.R.: Experimental comparison of two quantum computing architectures. Quant.
Phys. Comput. Sci. Emer. Technol. (2017). abs/1702.01852
18. Maslov, D.: Advantages of using relative-phase Toffoli gates with an application to multiple
control Toffoli optimization. Phys. Rev. A 93(2), 022311 (2016)
19. Mishchenko, A., Perkowski, M.A.: Fast heuristic minimization of exclusive-sums-of-products.
In: Reed-Muller Workshop (2001)
20. Mishchenko, A., Perkowski, M.A.: Logic synthesis of reversible wave cascades. In: International Workshop on Logic Synthesis, pp. 197–202 (2002)
21. Mizuki, T., Otagiri, T., Sone, H.: An application of ESOP expressions to secure computations.
J. Circuits Syst. Comput. 16(2), 191–198 (2007)
22. Papakonstantinou, G.K.: A parallel algorithm for minimizing ESOP expressions. J. Circuits
Syst. Comput. 23(1), 1450015 (2014)
23. Papakonstantinou, K.G., Papakonstantinou, G.: A nonlinear integer programming approach for
the minimization of Boolean expressions. J. Circuits Syst. Comput. 29(10), 1850163 (2018)
24. Riener, H., Ehlers, R., Fey, G.: CEGAR-based EF synthesis of Boolean functions with
an application to circuit rectification. In: 22nd Asia and South Pacific Design Automation
Conference, ASP-DAC 2017, Chiba, January 16–19, 2017, pp. 251–256
25. Sampson, M., Kalathas, M., Voudouris, D., Papakonstantinou, G.K.: Exact ESOP expressions
for incompletely specified functions. Integration 45(2), 197–204 (2012)
26. Sasao, T., Fujita, M. (eds.): Representations of Logic Functions Using EXOR Operators, pp.
29–54. Springer, New York (1996)
27. Soeken, M., Roetteler, M., Wiebe, N., De Micheli, G.: Design automation and design space
exploration for quantum computers. In: Design, Automation and Test in Europe, pp. 470–475
(2017)
28. Soeken, M., Riener, H., Haaswijk, W., De Micheli, G.: The EPFL logic synthesis libraries
(2018). arXiv e-prints 1805.05121
29. Soeken, M., Mozafari, F., Schmitt, B., De Micheli, G.: Compiling permutations for superconducting QPUs. In: Design Automation Conference (2019)
30. Stergiou, S., Papakonstantinou, G.K.: Exact minimization of ESOP expressions with less than
eight product terms. J. Circuits Syst. Comput. 13(1), 1–15 (2004)
H. Riener et al.
17. Linke, N.M., Maslov, D., Rötteler, M., Debnath, S., Figgatt, C., Landsman, K.A., Wright,
K., Monroe, C.R.: Experimental comparison of two quantum computing architectures. Quant.
Phys. Comput. Sci. Emer. Technol. (2017). abs/1702.01852
18. Maslov, D.: Advantages of using relative-phase Toffoli gates with an application to multiple
control Toffoli optimization. Phys. Rev. A 93(2), 022311 (2016)
19. Mishchenko, A., Perkowski, M.A.: Fast heuristic minimization of exclusive-sums-of-products.
In: Reed-Muller Workshop (2001)
20. Mishchenko, A., Perkowski, M.A.: Logic synthesis of reversible wave cascades. In: International Workshop on Logic Synthesis, pp. 197–202 (2002)
21. Mizuki, T., Otagiri, T., Sone, H.: An application of ESOP expressions to secure computations.
J. Circuits Syst. Comput. 16(2), 191–198 (2007)
22. Papakonstantinou, G.K.: A parallel algorithm for minimizing ESOP expressions. J. Circuits
Syst. Comput. 23(1), 1450015 (2014)
23. Papakonstantinou, K.G., Papakonstantinou, G.: A nonlinear integer programming approach for
the minimization of Boolean expressions. J. Circuits Syst. Comput. 29(10), 1850163 (2018)
24. Riener, H., Ehlers, R., Fey, G.: CEGAR-based EF synthesis of Boolean functions with
an application to circuit rectification. In: 22nd Asia and South Pacific Design Automation
Conference, ASP-DAC 2017, Chiba, January 16–19, 2017, pp. 251–256
25. Sampson, M., Kalathas, M., Voudouris, D., Papakonstantinou, G.K.: Exact ESOP expressions
for incompletely specified functions. Integration 45(2), 197–204 (2012)
26. Sasao, T., Fujita, M. (eds.): Representations of Logic Functions Using EXOR Operators, pp.
29–54. Springer, New York (1996)
27. Soeken, M., Roetteler, M., Wiebe, N., De Micheli, G.: Design automation and design space
exploration for quantum computers. In: Design, Automation and Test in Europe, pp. 470–475
(2017)
28. Soeken, M., Riener, H., Haaswijk, W., De Micheli, G.: The EPFL logic synthesis libraries
(2018). arXiv e-prints 1805.05121
29. Soeken, M., Mozafari, F., Schmitt, B., De Micheli, G.: Compiling permutations for superconducting QPUs. In: Design Automation Conference (2019)
30. Stergiou, S., Papakonstantinou, G.K.: Exact minimization of ESOP expressions with less than
eight product terms. J. Circuits Syst. Comput. 13(1), 1–15 (2004)
