174
A. Bernasconi et al.
4. Altun, M., Riedel, M.D.: Logic synthesis for switching lattices. IEEE Trans. Comput. 61(11),
1588–1600 (2012)
5. Altun, M., Ciriani, V., Tahoori, M.B.: Computing with nano-crossbar arrays: logic synthesis
and fault tolerance. In: Design, Automation & Test in Europe Conference & Exhibition, DATE
2017, Lausanne, March 27–31, 2017, pp. 278–281 (2017)
6. Asahiro, Y., Miyano, E., Ono, H., Zenmyo, K.: Graph orientation algorithms to minimize the
maximum outdegree. Int. J. Found. Comput. Sci. 18(2) 197–215 (2010)
7. Barbuti, R., Gori, R., Milazzo, P.: Multiset patterns and their application to dynamic causalities
in membrane systems. In: Membrane Computing - 18th International Conference, CMC 2017,
Bradford, July 25–28, 2017. Revised Selected Papers, pp. 54–73
8. Barbuti, R., Bernasconi, A., Gori, R., Milazzo, P.: Computing preimages and ancestors in
reaction systems. In: Theory and Practice of Natural Computing - 7th International Conference,
TPNC 2018, Dublin, December 12–14, 2018, Proceedings, pp. 23–35
9. Barbuti, R., Gori, R., Milazzo, P.: Predictors for flat membrane systems. Theor. Comput. Sci.
736, 79–102 (2018)
10. Bernasconi, A., Ciriani, V.: DRedSOP: synthesis of a new class of regular functions. In:
Euromicro Conference on Digital Systems Design (DSD), pp. 377–384 (2006)
11. Bernasconi, A., Ciriani, V.: Logic synthesis and testability of d-reducible functions. In: VLSISoC, pp. 280–285 (2010)
12. Bernasconi, A., Ciriani, V.: Dimension-reducible Boolean functions based on affine spaces.
ACM Trans. Des. Autom. Electron. Syst. 16(2), 13 (2011)
13. Bernasconi, A., Ciriani, V., Luccio, F., Pagli, L.: Exploiting regularities for Boolean function
synthesis. Theory Comput. Syst. 39(4), 485–501 (2006)
14. Bernasconi, A., Ciriani, V., Luccio, F., Pagli, L.: Synthesis of autosymmetric functions in a
new three-level form. Theory Comput. Syst. 42(4), 450–464 (2008)
15. Bernasconi, A., Ciriani, V., Trucco, G., Villa, T.: Logic synthesis by signal-driven decomposition. In: Gulati, K. (ed.) Advanced Techniques in Logic Synthesis, Optimizations and
Applications, pp. 9–29. Springer, New York (2011)
16. Bernasconi, A., Ciriani, V., Liberali, V., Trucco, G., Villa, T.: Synthesis of p-circuits for logic
restructuring. Integration 45(3), 282–293 (2012)
17. Bernasconi, A., Ciriani, V., Trucco, G., Villa, T.: Using flexibility in P-circuits by Boolean
relations. IEEE Trans. Comput. 64(12), 3605–3618 (2015)
18. Bernasconi, A., Ciriani, V., Frontini, L., Liberali, V., Trucco, G., Villa, T.: Logic synthesis for
switching lattices by decomposition with p-circuits. In: 2016 Euromicro Conference on Digital
System Design, DSD 2016, Limassol, August 31–September 2, 2016, pp. 423–430
19. Bernasconi, A., Ciriani, V., Frontini, L., Trucco, G.: Synthesis on switching lattices of
dimension-reducible Boolean functions. In: IFIP/IEEE International Conference on Very Large
Scale Integration (VLSI-SoC) (2016)
20. Bernasconi, A., Ciriani, V., Frontini, L., Trucco, G.: Composition of switching lattices and
autosymmetric Boolean function synthesis. In: Euromicro Conference on Digital System
Design, DSD 2017, Vienna, August 30–September 1, 2017, pp. 137–144
21. Bernasconi, A., Boffa, A., Luccio, F., Pagli, L.: Two combinatorial problems on the layout
of switching lattices. In: IFIP/IEEE International Conference on Very Large Scale Integration
(VLSI-SoC) (2018)
22. Bernasconi, A., Ciriani, V., Frontini, L.: Testability of switching lattices in the stuck at fault
model. In: IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
(2018)
23. Bernasconi, A., Ciriani, V., Frontini, L., Liberali, V., Trucco, G., Villa, T.: Enhancing logic
synthesis of switching lattices by generalized Shannon decomposition methods. Microprocess.
Microsyst. Embed. Hardw. Des. 56, 193–203 (2018)
24. Bernasconi, A., Ciriani, V., Frontini, L., Trucco, G.: Composition of switching lattices for
regular and for decomposed functions. Microprocess. Microsyst. Embed. Hardw. Des. 60, 207–
218 (2018)
A. Bernasconi et al.
4. Altun, M., Riedel, M.D.: Logic synthesis for switching lattices. IEEE Trans. Comput. 61(11),
1588–1600 (2012)
5. Altun, M., Ciriani, V., Tahoori, M.B.: Computing with nano-crossbar arrays: logic synthesis
and fault tolerance. In: Design, Automation & Test in Europe Conference & Exhibition, DATE
2017, Lausanne, March 27–31, 2017, pp. 278–281 (2017)
6. Asahiro, Y., Miyano, E., Ono, H., Zenmyo, K.: Graph orientation algorithms to minimize the
maximum outdegree. Int. J. Found. Comput. Sci. 18(2) 197–215 (2010)
7. Barbuti, R., Gori, R., Milazzo, P.: Multiset patterns and their application to dynamic causalities
in membrane systems. In: Membrane Computing - 18th International Conference, CMC 2017,
Bradford, July 25–28, 2017. Revised Selected Papers, pp. 54–73
8. Barbuti, R., Bernasconi, A., Gori, R., Milazzo, P.: Computing preimages and ancestors in
reaction systems. In: Theory and Practice of Natural Computing - 7th International Conference,
TPNC 2018, Dublin, December 12–14, 2018, Proceedings, pp. 23–35
9. Barbuti, R., Gori, R., Milazzo, P.: Predictors for flat membrane systems. Theor. Comput. Sci.
736, 79–102 (2018)
10. Bernasconi, A., Ciriani, V.: DRedSOP: synthesis of a new class of regular functions. In:
Euromicro Conference on Digital Systems Design (DSD), pp. 377–384 (2006)
11. Bernasconi, A., Ciriani, V.: Logic synthesis and testability of d-reducible functions. In: VLSISoC, pp. 280–285 (2010)
12. Bernasconi, A., Ciriani, V.: Dimension-reducible Boolean functions based on affine spaces.
ACM Trans. Des. Autom. Electron. Syst. 16(2), 13 (2011)
13. Bernasconi, A., Ciriani, V., Luccio, F., Pagli, L.: Exploiting regularities for Boolean function
synthesis. Theory Comput. Syst. 39(4), 485–501 (2006)
14. Bernasconi, A., Ciriani, V., Luccio, F., Pagli, L.: Synthesis of autosymmetric functions in a
new three-level form. Theory Comput. Syst. 42(4), 450–464 (2008)
15. Bernasconi, A., Ciriani, V., Trucco, G., Villa, T.: Logic synthesis by signal-driven decomposition. In: Gulati, K. (ed.) Advanced Techniques in Logic Synthesis, Optimizations and
Applications, pp. 9–29. Springer, New York (2011)
16. Bernasconi, A., Ciriani, V., Liberali, V., Trucco, G., Villa, T.: Synthesis of p-circuits for logic
restructuring. Integration 45(3), 282–293 (2012)
17. Bernasconi, A., Ciriani, V., Trucco, G., Villa, T.: Using flexibility in P-circuits by Boolean
relations. IEEE Trans. Comput. 64(12), 3605–3618 (2015)
18. Bernasconi, A., Ciriani, V., Frontini, L., Liberali, V., Trucco, G., Villa, T.: Logic synthesis for
switching lattices by decomposition with p-circuits. In: 2016 Euromicro Conference on Digital
System Design, DSD 2016, Limassol, August 31–September 2, 2016, pp. 423–430
19. Bernasconi, A., Ciriani, V., Frontini, L., Trucco, G.: Synthesis on switching lattices of
dimension-reducible Boolean functions. In: IFIP/IEEE International Conference on Very Large
Scale Integration (VLSI-SoC) (2016)
20. Bernasconi, A., Ciriani, V., Frontini, L., Trucco, G.: Composition of switching lattices and
autosymmetric Boolean function synthesis. In: Euromicro Conference on Digital System
Design, DSD 2017, Vienna, August 30–September 1, 2017, pp. 137–144
21. Bernasconi, A., Boffa, A., Luccio, F., Pagli, L.: Two combinatorial problems on the layout
of switching lattices. In: IFIP/IEEE International Conference on Very Large Scale Integration
(VLSI-SoC) (2018)
22. Bernasconi, A., Ciriani, V., Frontini, L.: Testability of switching lattices in the stuck at fault
model. In: IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
(2018)
23. Bernasconi, A., Ciriani, V., Frontini, L., Liberali, V., Trucco, G., Villa, T.: Enhancing logic
synthesis of switching lattices by generalized Shannon decomposition methods. Microprocess.
Microsyst. Embed. Hardw. Des. 56, 193–203 (2018)
24. Bernasconi, A., Ciriani, V., Frontini, L., Trucco, G.: Composition of switching lattices for
regular and for decomposed functions. Microprocess. Microsyst. Embed. Hardw. Des. 60, 207–
218 (2018)