ERRIC architecture, 197
ERRIC language, 171
ERRIC reliability, 215
ERRIC reliability analysis, 215
Executable file formats, 301
Execute instruction, 198
Execution, 304
Extensibility, 298
F
Fault log, 178
Fault tolerance, 1, 4, 5, 8, 11, 13–18, 21, 22,
25–27, 30, 33–37, 39, 40, 44, 45, 47, 56,
57, 59, 60, 64–66, 71, 89, 93–95, 105,
111, 114, 151, 165, 190, 193, 194, 197,
215, 216, 219, 249, 281
Fault tolerant interactors, 190
Fault-tolerant operating systems, 59, 75, 193
Fault tolerant semaphores, 190, 191, 278
Faulty, 104
Fence model, 243
Fetch instruction, 198
Flash interface / flash driver, 136
Flash properties, 132
Forward tracing algorithm, 53, 54, 259, 261
Freeing, 303
FT interrupt handler, 177
FT scheduler, 178
FT scheduling, 87
Functions, Operators and Instruction execution,
300
G
GAFT derivation, 49
GAFT properties, 33
Generalized algorithm of fault tolerance,
25–31, 33, 35–37, 39, 44, 45, 47–50,
56, 57, 59, 65, 67, 71, 87, 111, 112, 141,
147, 165, 174, 193, 194, 200, 249,
255–257
Graceful degradation, 3, 30, 49, 97, 102, 263
Graph-logic model for concurrency and
parallelism, 186, 187
Graph theory, 267, 270, 275, 276
H
Hardware-checking, 32, 35, 71, 72, 84, 90,
101, 111
Hardware-checking process, 72
Hardware checks, 93
Hardware condition monitor, 103, 105
Hardware faults, 5, 7, 11, 14, 15, 18, 21,
26–29, 34–36, 56, 65, 68, 71, 72, 89, 99,
101, 143, 144, 147, 164
Hardware monitor, 178
Hardware performance, 225, 227, 230, 233
Hardware reconfiguration, 108
Hardware recovery support, 123
Hardware redundancy, 39
Hardware redundancy and reliability, 38
Hardware redundancy for checking, 37, 44,
216, 217
Hardware redundancy for recovery, 33
Hardware redundancy for recovery preparation,
37
Hardware support for recovery, 123
Hardware support for recovery point creation,
123
Hardware support for system recovery, 5
Hardware support for the MLR algorithm, 150
Hardware syndrome, 71
Hardware zones, 228
Heuristic algorithms, vector heuristics, 267,
283, 284, 290
I
Implementation aspects, 121, 128, 134
Implementation steps, 257
Information processing, 223, 225, 227, 228,
230, 233, 246, 251
Information redundancy, 16, 20, 126
Initialization, 302
Instruction levels of error detection, 33, 142
Instruction set, 93, 167, 197, 202, 207, 209,
212, 231, 246, 251
Integrity OS, 193
Intel 86’, 207
Interface zone, 4
Interfacing zone, 96
Internal structure of ERRIC Interpreter, 299
L
L4ReAnimator, 193
L4 Se, 193
Language concurrency support, 5
Language properties for supporting fault
tolerance, 4
Language support of recovery, 5
Language support of system fault tolerance
memory monitoring, 90
message passing, 112, 115, 116, 143, 242
recovery preparation, 111, 137, 165, 174
recovery process, 10, 68, 114, 121, 131,
136, 141, 142, 147, 150, 201, 216, 257,
260
Library, 121, 199, 212, 293, 295, 297–299,
302, 304
Limiting checkpoint size, 118
306
Index
ERRIC language, 171
ERRIC reliability, 215
ERRIC reliability analysis, 215
Executable file formats, 301
Execute instruction, 198
Execution, 304
Extensibility, 298
F
Fault log, 178
Fault tolerance, 1, 4, 5, 8, 11, 13–18, 21, 22,
25–27, 30, 33–37, 39, 40, 44, 45, 47, 56,
57, 59, 60, 64–66, 71, 89, 93–95, 105,
111, 114, 151, 165, 190, 193, 194, 197,
215, 216, 219, 249, 281
Fault tolerant interactors, 190
Fault-tolerant operating systems, 59, 75, 193
Fault tolerant semaphores, 190, 191, 278
Faulty, 104
Fence model, 243
Fetch instruction, 198
Flash interface / flash driver, 136
Flash properties, 132
Forward tracing algorithm, 53, 54, 259, 261
Freeing, 303
FT interrupt handler, 177
FT scheduler, 178
FT scheduling, 87
Functions, Operators and Instruction execution,
300
G
GAFT derivation, 49
GAFT properties, 33
Generalized algorithm of fault tolerance,
25–31, 33, 35–37, 39, 44, 45, 47–50,
56, 57, 59, 65, 67, 71, 87, 111, 112, 141,
147, 165, 174, 193, 194, 200, 249,
255–257
Graceful degradation, 3, 30, 49, 97, 102, 263
Graph-logic model for concurrency and
parallelism, 186, 187
Graph theory, 267, 270, 275, 276
H
Hardware-checking, 32, 35, 71, 72, 84, 90,
101, 111
Hardware-checking process, 72
Hardware checks, 93
Hardware condition monitor, 103, 105
Hardware faults, 5, 7, 11, 14, 15, 18, 21,
26–29, 34–36, 56, 65, 68, 71, 72, 89, 99,
101, 143, 144, 147, 164
Hardware monitor, 178
Hardware performance, 225, 227, 230, 233
Hardware reconfiguration, 108
Hardware recovery support, 123
Hardware redundancy, 39
Hardware redundancy and reliability, 38
Hardware redundancy for checking, 37, 44,
216, 217
Hardware redundancy for recovery, 33
Hardware redundancy for recovery preparation,
37
Hardware support for recovery, 123
Hardware support for recovery point creation,
123
Hardware support for system recovery, 5
Hardware support for the MLR algorithm, 150
Hardware syndrome, 71
Hardware zones, 228
Heuristic algorithms, vector heuristics, 267,
283, 284, 290
I
Implementation aspects, 121, 128, 134
Implementation steps, 257
Information processing, 223, 225, 227, 228,
230, 233, 246, 251
Information redundancy, 16, 20, 126
Initialization, 302
Instruction levels of error detection, 33, 142
Instruction set, 93, 167, 197, 202, 207, 209,
212, 231, 246, 251
Integrity OS, 193
Intel 86’, 207
Interface zone, 4
Interfacing zone, 96
Internal structure of ERRIC Interpreter, 299
L
L4ReAnimator, 193
L4 Se, 193
Language concurrency support, 5
Language properties for supporting fault
tolerance, 4
Language support of recovery, 5
Language support of system fault tolerance
memory monitoring, 90
message passing, 112, 115, 116, 143, 242
recovery preparation, 111, 137, 165, 174
recovery process, 10, 68, 114, 121, 131,
136, 141, 142, 147, 150, 201, 216, 257,
260
Library, 121, 199, 212, 293, 295, 297–299,
302, 304
Limiting checkpoint size, 118
306
Index