This allows adding new file formats, with, maybe, some extra debug information, in
the future.
Using file formats opens the possibilities for extending both architecture and
interpreter in the future, while allowing for keeping backwards compatibility.
Formats described in more details in Appendix 1.
As mentioned before, the simulator supports two different file formats, but it is
capable of recognizing up to 256 formats in the current design and can be safely
extended to 65,535 different types.
Appendix 1: Internal Structure of ERRIC Interpreter
and API Description
A.1 The Main Structure
The erric_t structure is the primary component of the library, Fig. 20.3: it represents a single CPU running the ERRIC architecture and contains the memory
chunk and the registers for the processor:
Using the structure, the memory of the ERRIC machine can be accessed through
erric_t->memory word array, and registers via erric_t->registers.
struct erric_t {
// common registers
lword_t *registers;
// machine memory
word_t *memory;
// size of the memory (in words)
uint32_t memory_size;
// instruction register
word_t IR;
// Status code field, checked after every instruction
sword_t status_code;
};
Fig. 20.3 ERRIC_t structure
20.5 Interpreter: The Implementation
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