17.5.2 Hardware Performance—Instruction Execution
Hardware instruction is implemented using different blocks (zones) that in combination enable to processing.
An example of information tracing through instruction execution is presented in
Fig. 17.13 and serves for further understanding of performance evaluation.
Data might be loaded:
– from external source straight to AZ (instruction type A),
– unloaded from AZ to external source (instruction type B),
– loaded directly to the passive zone (instruction type D), and
– unloaded from PZ to the external source (instruction type C).
Information might be
– processed and loaded to passive zone (instruction type H),
– retrieved from PZ into AZ to be processed (instruction type K), or
– processed in AZ and unloaded to PZ.
In fact, interface zone is involved in almost any information transfer internal or
external, and in both directions inbound and outbound. It means that the performance of IZ contributes to overall performance of information processing. Special
and most promising architecture will be discussed further that limit the role of IZ on
overall performance of the computer system.
Other types of instruction not shown might combine the proposed types of
instructions.
Let us elaborate a bit what Fig. 17.12 illustrates. Information can come externally through interfacing zone IZ and stored in active zone for further processing—
A-type instruction.
From active zone (Arithmetic unit or logic unit or several of them), information
through interfacing zone can be transferred out—B-type of instruction.
Well-known good old days direct memory access (DMA)—C-type instructions—are about disabled active zone and read data directly from passive zone
(including registers and all types of memory).
The same way information might be loaded into passive zone—D-type
instructions—and this is very useful for embedded systems.
In turn, self-isolated instructions, E-type, are about using only active zone and
keeping results inside it—sometimes not even addressable at the level of registers—
accumulators, signs, or working register.
When instruction processes data, the result can be transferred down to passive
zone through interfacing zone—F-type.
Opposite data move: G-instruction are required to deliver data for further
processing.
Well away from RISC architectures, instructions can have several cycles of data
processing and include result transfer down to passive zone: H-type of instructions.
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