124
A. Tabuchi et al.
Network
Node
Processor
Accelerator
Host
Memory
Fig. 1 Hardware model
research area of “Development of System Software Technologies for Post-Peta
Scale High Performance Computing.”
1.1 Hardware Model
The target of XACC is an accelerated cluster, a hardware model of which is shown
in Fig. 1.
An execution unit is called node as with XMP. Each node consists of a single
host and multiple accelerators (such as GPUs and Intel MICs). Each host has a
processor, which may have several cores, and own local memory. Each accelerator
also has them. Each node is connected with each other via network. Each node can
access its local memories directly and remote memories, that is, the memories of
another node indirectly. In a host, the accelerator memory may be physically and/or
virtually separate from the host memory as with the memory model of OpenACC.
Thus, a host may not be able to read or write the accelerator memory directly.
1.2 Programming Model
XACC is a directive-based language extension based on Fortran 90 and ISO C90
(ANSI C90). To develop applications on accelerated clusters with ease, XACC
extends XMP and OpenACC independently as follows: (1) XMP extensions are
to facilitate cooperation between XMP and OpenACC directives. (2) OpenACC
extensions are to deal with multiple accelerators.
1.2.1 XMP Extensions
In a program using the XMP extensions, XMP, OpenACC, and XACC directives
are used. Figure 2 shows a concept of the XMP extensions.
XMP directives define a template and a node set. The template represents
a global index space, which is distributed onto the node set. Moreover, XMP
A. Tabuchi et al.
Network
Node
Processor
Accelerator
Host
Memory
Fig. 1 Hardware model
research area of “Development of System Software Technologies for Post-Peta
Scale High Performance Computing.”
1.1 Hardware Model
The target of XACC is an accelerated cluster, a hardware model of which is shown
in Fig. 1.
An execution unit is called node as with XMP. Each node consists of a single
host and multiple accelerators (such as GPUs and Intel MICs). Each host has a
processor, which may have several cores, and own local memory. Each accelerator
also has them. Each node is connected with each other via network. Each node can
access its local memories directly and remote memories, that is, the memories of
another node indirectly. In a host, the accelerator memory may be physically and/or
virtually separate from the host memory as with the memory model of OpenACC.
Thus, a host may not be able to read or write the accelerator memory directly.
1.2 Programming Model
XACC is a directive-based language extension based on Fortran 90 and ISO C90
(ANSI C90). To develop applications on accelerated clusters with ease, XACC
extends XMP and OpenACC independently as follows: (1) XMP extensions are
to facilitate cooperation between XMP and OpenACC directives. (2) OpenACC
extensions are to deal with multiple accelerators.
1.2.1 XMP Extensions
In a program using the XMP extensions, XMP, OpenACC, and XACC directives
are used. Figure 2 shows a concept of the XMP extensions.
XMP directives define a template and a node set. The template represents
a global index space, which is distributed onto the node set. Moreover, XMP