546
W. H. Smith
Fig. 12.7 Common architectures for collider detector trigger and data acquisition systems. Left:
two physical levels. Right: three physical levels
The architectures of Level-2 trigger systems vary depending on the rejection
factor required, the information provided as input, the interconnections with the
front-end electronics, Level-1 and Level-2. Examples of two types of architecture
presently employed by general-purpose collider detectors are shown in Fig. 12.7.
Including Level-1, experiments such as H1, ZEUS, CDF, DØ and ATLAS have three
physical levels of processing [18]. For Run-2, the ATLAS Higher Level Trigger
Layers (HLT) were combined [15]. CMS has two layers of physical processing [19].
LHCb has three levels of processing, but the first level (Level-0) output trigger rate
is 1.1 MHz, an order of magnitude higher than other collider experiments [7, 17].
The subsequent levels, HLT1 and HLT2, are software-based, running on the Event
Filter Farm. In Run-2, HLT1 and HLT2 became two independent asynchronous
processes on the same node and HLT2 was able to run a full reconstruction on
real-time aligned and calibrated data [17].
There are more substantial differences in trigger architecture for experiments
such as ALICE that is designed to study heavy ion collisions with a bunch spacing of
125 ns at a lower luminosity than the LHC experiments ATLAS and CMS. However,
each Pb–Pb collision produces much higher multiplicities of secondary particles
than a p–p collision, resulting in a much higher event size. Since the detectors
in ALICE have different readout times, there are three parallel trigger systems,
allowing readout from the faster detectors while slower detectors are occupied with
reading out the data from earlier events [8]. The first decision is made 1.2 μs after
the event (Level-0), the Level-1 decision comes after 6.5 μs, and the Level-2 trigger
is issued after 88 μs. The Level-1 and Level-2 decisions can veto trigger signals
from Level-0. The ALICE Central Trigger Processor also checks the events for pileup from events in a programmable time interval before and after the interaction at
all three levels. For Run-2, an earlier L0 trigger decision time of 525 ns provides a
pre-trigger for the TRD [24].
W. H. Smith
Fig. 12.7 Common architectures for collider detector trigger and data acquisition systems. Left:
two physical levels. Right: three physical levels
The architectures of Level-2 trigger systems vary depending on the rejection
factor required, the information provided as input, the interconnections with the
front-end electronics, Level-1 and Level-2. Examples of two types of architecture
presently employed by general-purpose collider detectors are shown in Fig. 12.7.
Including Level-1, experiments such as H1, ZEUS, CDF, DØ and ATLAS have three
physical levels of processing [18]. For Run-2, the ATLAS Higher Level Trigger
Layers (HLT) were combined [15]. CMS has two layers of physical processing [19].
LHCb has three levels of processing, but the first level (Level-0) output trigger rate
is 1.1 MHz, an order of magnitude higher than other collider experiments [7, 17].
The subsequent levels, HLT1 and HLT2, are software-based, running on the Event
Filter Farm. In Run-2, HLT1 and HLT2 became two independent asynchronous
processes on the same node and HLT2 was able to run a full reconstruction on
real-time aligned and calibrated data [17].
There are more substantial differences in trigger architecture for experiments
such as ALICE that is designed to study heavy ion collisions with a bunch spacing of
125 ns at a lower luminosity than the LHC experiments ATLAS and CMS. However,
each Pb–Pb collision produces much higher multiplicities of secondary particles
than a p–p collision, resulting in a much higher event size. Since the detectors
in ALICE have different readout times, there are three parallel trigger systems,
allowing readout from the faster detectors while slower detectors are occupied with
reading out the data from earlier events [8]. The first decision is made 1.2 μs after
the event (Level-0), the Level-1 decision comes after 6.5 μs, and the Level-2 trigger
is issued after 88 μs. The Level-1 and Level-2 decisions can veto trigger signals
from Level-0. The ALICE Central Trigger Processor also checks the events for pileup from events in a programmable time interval before and after the interaction at
all three levels. For Run-2, an earlier L0 trigger decision time of 525 ns provides a
pre-trigger for the TRD [24].