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Low-Power Techniques for Network-on-Chip
Given the predicted communication link utilization, and input buffer utilization, BU predicted , the DVS policy dynamically adapts its voltage scaling to
achieve power savings with minimal impact on performance. It prescribes
whether to increase the link voltage and frequency to next higher level,
decrease the link voltage and frequency to next lower level, or do nothing.
Intuitively, when a link is highly utilized, voltage scaling is enabled so that
link frequency can be increased to handle the load. Similarly, if a link is
mostly idle, voltage scaling is carried out so that the link frequency can drop
to save power. Otherwise, voltage scaling is conservatively carried out to
minimize the impact on performance. The prescribed action depends on
four thresholds, two of which are used when the network is lightly loaded
(TH high , TH low ) and the other two are used when the network is highly congested (TH high , TH low ). In the latter case, since link delay can be hidden, the
thresholds prescribe more aggressive power savings. The pseudocode of the
proposed DVS policy is shown in Algorithm 1.
Algorithm 1
Dynamic voltage scaling
while (DVS enable) do
LU predicted = (W *LU current + LU past )/(W + 1)
LU past = LU predicted
BU predicted = (W *BU current + BU past )/(W + 1)
BU past = BU predicted
if (BU predicted < BU congested ) then
T low = TL l ow , T high = TL high
else
T low = TH low , T high = TH high
end if
if (LU predicted < T low ) then
NewVol link = Voltage _ table[ C urLevel lin k + 1]
NewFreq link = Frequency _ table[ C urLevel +
lin k
1]
else if (LU predicted > T high ) then
NewVol link = Voltage _ table [ C urLevel lin k – 1]
NewFreq link = Frequency _ table[ C urLevel lin k – 1]