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12
Compact Model Library for Circuit Simulation
12.1 Introduction
In Chapters 4 through 11, we have discussed compact model formulation for
different VLSI (very-large-scale-integrated) devices. In this chapter a brief overview of the generation of compact model library for circuit simulation and
compact model usage in circuit CAD (computer-aided design) is provided. A
typical CMOS (complementary metal-oxide-semiconductor) technology and
Berkeley Short Channel IGFET Model, version 4 (BSIM4) compact MOSFET
(metal-oxide-semiconductor field-effect transistor) model are used to illustrate
the methodology to build a compact model library for HSPICE (see Chapter 1)
circuit CAD [1,2]. Note that the circuit CAD tools and the device models are
continuously updated for improving the accuracy and simulation efficiency. So,
the basic idea for compact model development presented in this chapter must be
appropriately modified to the changing modeling and circuit CAD tools.
12.2 General Approach to Generate Compact Device Model
A generalized methodology to build a compact device model library is shown
in Figure 12.1. As shown in Figure 12.1, the procedure involves data collection, data fitting to the target compact model, extraction of model parameters, generation of model library, and verification of model for accuracy and
predictability. Each of these steps to generate a computationally robust compact model library depends on the device technology (e.g., MOSFETs), target
model (e.g., BSIM4), design target (e.g., digital), and so on. In this chapter, we will use BSIM4 to illustrate the modeling methodology outlined in
Figure 12.1 [2].
12.2.1 Data Collection
The first task in generating a model library is the data collection from the
devices of the target technology representing the entire design space under
the operating biasing conditions and ambient temperatures. Data collection
12
Compact Model Library for Circuit Simulation
12.1 Introduction
In Chapters 4 through 11, we have discussed compact model formulation for
different VLSI (very-large-scale-integrated) devices. In this chapter a brief overview of the generation of compact model library for circuit simulation and
compact model usage in circuit CAD (computer-aided design) is provided. A
typical CMOS (complementary metal-oxide-semiconductor) technology and
Berkeley Short Channel IGFET Model, version 4 (BSIM4) compact MOSFET
(metal-oxide-semiconductor field-effect transistor) model are used to illustrate
the methodology to build a compact model library for HSPICE (see Chapter 1)
circuit CAD [1,2]. Note that the circuit CAD tools and the device models are
continuously updated for improving the accuracy and simulation efficiency. So,
the basic idea for compact model development presented in this chapter must be
appropriately modified to the changing modeling and circuit CAD tools.
12.2 General Approach to Generate Compact Device Model
A generalized methodology to build a compact device model library is shown
in Figure 12.1. As shown in Figure 12.1, the procedure involves data collection, data fitting to the target compact model, extraction of model parameters, generation of model library, and verification of model for accuracy and
predictability. Each of these steps to generate a computationally robust compact model library depends on the device technology (e.g., MOSFETs), target
model (e.g., BSIM4), design target (e.g., digital), and so on. In this chapter, we will use BSIM4 to illustrate the modeling methodology outlined in
Figure 12.1 [2].
12.2.1 Data Collection
The first task in generating a model library is the data collection from the
devices of the target technology representing the entire design space under
the operating biasing conditions and ambient temperatures. Data collection