6
Compact Models for Integrated Circuit Design
to as the Schichmann and Hodges model. This model is implemented in SPICE
as the MOS Level 1 model and is developed based on a number of simplifying assumptions and device physics appropriate for uniformly doped longchannel MOSFET devices. In addition, in MOS Level 1 model, the value of I ds
is zero below V th , increases linearly above V th , and remains constant above a
drain saturation voltage (V dsat ). The MOS Level 1 model, though inaccurate, is
widely used for hand calculation of I–V data and preliminary circuit simulation because of its simplicity and ease of use.
In order to account for the shortcomings of MOS Level 1  model such as
small geometry effects, Ihantola and Moll [21] modified the device equation
to use in SPICE as the MOS Level 2 model. The basic approach is to begin
with the Level 1  model, and add equations and parameters to include the
small geometry effects as corrections to the basic model. Unlike the Level
1 model, it is assumed that the depletion charge varies along the length of
the channel; this results in a complex but more accurate expression for I ds in
SPICE Level 2 MOS model [35]. However, it is still not accurate for devices
with submicron geometries.
In 1974, MOSFET scaling rule was established [36], and the MOSFET device
and technology continued to evolve. As a result, the MOS device physics
became complex, circuit density increased, and the device models were continually updated to account for emerging physics in scaled MOSFETs. The
result is the evolution of MOS compact models. In 1978, Brews [23] reported
a simplified model based on charge sheet approximation of the inversion
charge density (Q i ) along with depletion approximation. With justified
assumptions of Q i , the total I ds is shown to be the sum of the drift (I ds1 ) and
diffusion components (I ds2 ). The values of f s at the source end (f s0 ) and drain
end (f sL ) of the devices required to calculate I ds are obtained numerically by
solving the implicit equation for f s along the channel at each applied biasing
condition. In weak inversion, where f s0  is almost equal to f sL , even a small
error in the values of f s0  and f sL can lead to a large error in the current I ds2 ,
which depends on the value of (f sL –f s0 ) [23]. Therefore, an accurate solution
is required for the surface potential, particularly for weak inversion current calculations. There are several iterative schemes developed to solve the
implicit equation for f s  [37]. However, the available iterative schemes to solve
this equation were relatively slow and did not include all regions of device
operation while noniterative approximations did not extend to the accumulation region and were not sufficiently accurate, especially for computing the
transcapacitances. Besides, the early f s -based models [23,37] consist of complex and lengthy expressions for currents, charges, and noise [38]. Thus, due
to the complexity of the f s expression along with the lack of efficient techniques to compute f s , these models [23,37] were computationally challenging for circuit simulation in the early days of EDA environment. Therefore,
search for different approaches continued to simplify the model for efficient
solution of the model equations for circuit CAD in EDA environment.
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