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Preface
FinFETs, and TFETs along with statistical MOS models. Thus, this book is
useful to beginners as well as experts in the field of microelectronics devices
and design engineering.
This book is intended for the senior undergraduate and graduate courses
in electrical and electronics engineering programs and researchers and practitioners working in the area of electron devices. However, the presentation
of the materials is such that even an undergraduate student not familiar with
semiconductor physics can understand the basic concepts of compact modeling. A limited number of exercise problems are included at the end of each
chapter, a feature that would help use of this book as a text for teaching at the
senior undergraduate and graduate level courses in academia.
Chapter  1 provides an overview of compact transistor and interconnection models, a brief history of compact MOSFET models, and the motivation for compact models for very-large-scale-integrated (VLSI) circuit CAD.
Chapter 2 reviews of basic semiconductor physics and pn-junction operations.
Chapter  3 presents MOS capacitor systems and the basic theory of two
terminal devices. This chapter provides the background for developing four
terminal MOSFET compact models for VLSI circuit CAD.
Chapter 4 describes the basic theory of long channel MOSFETs, including
the Pao-Sah model, the charge-sheet model, and earlier generations of compact models. Chapter  5 provides detailed mathematical steps to derive the
industry standard Berkeley Short Channel Insulated-Gate MOSFET version 4
(BSIM4) compact model. Chapter 5 also presents the parasitic models associated with MOSFET devices, including source/drain diode compact models.
Chapter  6 presents the dynamic behavior and compact MOSFET intrinsic
capacitance model. Chapter 7 describes the compact MOSFET modeling techniques for noise and radio-frequency circuit CAD.
Chapter  8 is dedicated to compact models for process variability analysis. This chapter describes the sources of variability, circuit model for process variability, and formulation of statistical models for variability-aware
VLSI circuit design. This chapter also presents the techniques for mitigating
the risk of process variability in advanced nanoscale VLSI circuits by novel
device and process architectures.
Chapter  9 describes the basic theory and compact model for multi-gate
transistors FinFETs and UTB-SOI MOSFETs, along with model parameter
extraction procedures. Chapter 10 introduces compact models beyond CMOS
devices including TFET.
Chapter 11 presents BJT compact models. Similar to Chapters 4 and 5, in
Chapter 11, the industry standard BJT models have been derived from basic
semiconductor theory and first generation models for easy understanding by
beginners while retaining the rigor for the experts in the field.
Chapter  12 includes examples of compact model libraries for industry
standard circuit simulation tools, calling the model in the circuit simulation
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