512
Digital Electronics
Example 12.7
Determine the conversion time of a 12-bit A/D converter of the counter type shown earlier in Fig.
12.32 for an input clock frequency of 1 MHz.
Solution
• The counter-type A/D converter shown in Fig. 12.32 has a variable conversion time that is maximum
when the input analogue voltage is just below the full-scale analogue input voltage.
• An average conversion time equal to half the maximum conversion time is usually defined in the
case of such converters.
• The maximum conversion time equals the time taken by 2
12
− 1 = 4095 cycles of clock input.
• The clock time period = 1/(1 × 10
6 = 1 s.
• Therefore, the maximum conversion time = 4095 × 1 = 4095 s = 4.095 ms.
• The average conversion time = (4.095/2) = 2.047 ms.
Example 12.8
The D/A converter of a counter-type A/D converter (refer to Fig. 12.32) produces a staircase output
having a step size of 10 mV. The A/D converter has a 10-bit resolution and is specified to have a
quantization error of ±1/2 LSB. Determine the digital output for an analogue input of 4.012 V. Assume
that the comparator has a comparison threshold of 1 mV.
Solution
• The comparator has a comparison threshold of 1 mV.
• With reference to Fig. 12.32, this implies that, for the comparator to change state, the voltage at the
relevant input should be 1 mV more than the voltage at the other input.
• Now, one of the inputs to the comparator is the analogue input voltage (= 4.012 V in the present
case).
• The other input to the comparator is a voltage that is equal to the sum of the D/A converter output
voltage and a fixed voltage corresponding to 1/2 LSB.
• This is the case when the quantization error of the A/D converter is specified to be ± 1/2 LSB.
• In the case of a quantization error of one LSB, the D/A converter directly feeds the other input of
the comparator.
• In the present case, one LSB corresponds to 10 mV.
• Therefore, 1/2 LSB corresponds to 5 mV.
• For an analogue input of 4.012 V, the voltage at the other input needs to be 4.013 V (owing to the
comparator threshold of 1 mV)
• This implies that the D/A converter output needs to be 4.008 V.
• Therefore, the number of steps = 4.008/(10 × 10
−3 = 400.8 = 401.
• The digital output is the binary equivalent of (401) 10 ,which equals 0110010001.
Example 12.9
A 10-bit A/D converter of the successive approximation type has a resolution (or quantization error)
of 10 mV. Determine the digital output for an analogue input of 4.365 V.
Digital Electronics
Example 12.7
Determine the conversion time of a 12-bit A/D converter of the counter type shown earlier in Fig.
12.32 for an input clock frequency of 1 MHz.
Solution
• The counter-type A/D converter shown in Fig. 12.32 has a variable conversion time that is maximum
when the input analogue voltage is just below the full-scale analogue input voltage.
• An average conversion time equal to half the maximum conversion time is usually defined in the
case of such converters.
• The maximum conversion time equals the time taken by 2
12
− 1 = 4095 cycles of clock input.
• The clock time period = 1/(1 × 10
6 = 1 s.
• Therefore, the maximum conversion time = 4095 × 1 = 4095 s = 4.095 ms.
• The average conversion time = (4.095/2) = 2.047 ms.
Example 12.8
The D/A converter of a counter-type A/D converter (refer to Fig. 12.32) produces a staircase output
having a step size of 10 mV. The A/D converter has a 10-bit resolution and is specified to have a
quantization error of ±1/2 LSB. Determine the digital output for an analogue input of 4.012 V. Assume
that the comparator has a comparison threshold of 1 mV.
Solution
• The comparator has a comparison threshold of 1 mV.
• With reference to Fig. 12.32, this implies that, for the comparator to change state, the voltage at the
relevant input should be 1 mV more than the voltage at the other input.
• Now, one of the inputs to the comparator is the analogue input voltage (= 4.012 V in the present
case).
• The other input to the comparator is a voltage that is equal to the sum of the D/A converter output
voltage and a fixed voltage corresponding to 1/2 LSB.
• This is the case when the quantization error of the A/D converter is specified to be ± 1/2 LSB.
• In the case of a quantization error of one LSB, the D/A converter directly feeds the other input of
the comparator.
• In the present case, one LSB corresponds to 10 mV.
• Therefore, 1/2 LSB corresponds to 5 mV.
• For an analogue input of 4.012 V, the voltage at the other input needs to be 4.013 V (owing to the
comparator threshold of 1 mV)
• This implies that the D/A converter output needs to be 4.008 V.
• Therefore, the number of steps = 4.008/(10 × 10
−3 = 400.8 = 401.
• The digital output is the binary equivalent of (401) 10 ,which equals 0110010001.
Example 12.9
A 10-bit A/D converter of the successive approximation type has a resolution (or quantization error)
of 10 mV. Determine the digital output for an analogue input of 4.365 V.