Programmable Logic Devices
325
00
01
11
10
CD
0
1
0
00
01
11
10
AB
(d)
0
0
X
1
0
0
1
1
X
X
X
X
X
Figure 9.21 (continued).
P = BBD + BBC + A
(9.17)
Q = BBC
(9.18)
R = B + C
(9.19)
S = AABBCCD + BBCCD + AAD + BBCCD
(9.20)
The next step is to choose a suitable PAL device. Since there are four output functions, we will need
a PAL device with at least four OR gates at the output. Since each of the OR gates is to be hard wired
to only a subset of programmable AND arrays, and also because one of the output functions has four
product terms, we will need an AND array of 16 AND gates. Since there are four input variables, we
need each AND gate in the array to have eight inputs to cater for four variables and their complements.
To sum up, we choose a PAL device that has eight inputs, 16 AND gates in the programmable AND
array and four OR gates at the output. Each OR gate has four inputs.
Figure 9.22 shows the architecture of the programmed PAL device. We can see that the P output
has only three product terms. The fourth input to the relevant OR gate needs to be applied a logic ‘0’
input. This is achieved by feeding the inputs of the corresponding AND gate with all four variables
and their complements. Logic 0s, wherever required, are implemented in the same manner. Note that,
in the programmed PAL device of Fig. 9.22, an unprogrammed interconnection indicated by a cross
(× is a ‘make’ connection.
9.6 Generic Array Logic
Generic array logic (GAL) is characterized by a reprogrammable AND array, a fixed OR array and
a reprogrammable output logic. It is similar to a PAL device, with the difference that the AND