248
Digital Electronics
Table 7.1 Results in binary and the expected results in BCD using a four-bit binary adder to perform the addition
of two BCD digits.
Decimal sum
Binary sum
BCD sum
K
Z 3
Z 2
Z 1
Z 0
C
S 3
S 2
S 1
S 0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
2
0
0
0
1
0
0
0
0
1
0
3
0
0
0
1
1
0
0
0
1
1
4
0
0
1
0
0
0
0
1
0
0
5
0
0
1
0
1
0
0
1
0
1
6
0
0
1
1
0
0
0
1
1
0
7
0
0
1
1
1
0
0
1
1
1
8
0
1
0
0
0
0
1
0
0
0
9
0
1
0
0
1
0
1
0
0
1
1 0
0
1
0
1
0
1
0
0
0
0
1 1
0
1
0
1
1
1
0
0
0
1
1 2
0
1
1
0
0
1
0
0
1
0
1 3
0
1
1
0
1
1
0
0
1
1
1 4
0
1
1
1
0
1
0
1
0
0
1 5
0
1
1
1
1
1
0
1
0
1
1 6
1
0
0
0
0
1
0
1
1
0
1 7
1
0
0
0
1
1
0
1
1
1
1 8
1
0
0
1
0
1
1
0
0
0
1 9
1
0
0
1
1
1
1
0
0
1
12, 13, 14 and 15. For the remaining two entries corresponding to a decimal sum equal to 10 and
11, a correction is applied for both Z 3 and Z 1 , being ‘1’. While hardware-implementing, 0110 can be
added to the binary sum output with the help of a second four-bit binary adder. The correction logic as
dictated by the Boolean expression (7.17) should ensure that (0110) gets added only when the above
expression is satisfied. Otherwise, the sum output of the first binary adder should be passed on as such
to the final output, which can be accomplished by adding (0000) in the second adder. Figure 7.21
shows the logic arrangement of a BCD adder capable of adding two BCD digits with the help of two
four-bit binary adders and some additional combinational logic.
The BCD adder described in the preceding paragraphs can be used to add two single-digit
BCD numbers only. However, a cascade arrangement of single-digit BCD adder hardware can be
used to perform the addition of multiple-digit BCD numbers. For example, an n-digit BCD adder
would require n such stages in cascade. As an illustration, Fig. 7.22 shows the block diagram of
a circuit for the addition of two three-digit BCD numbers. The first BCD adder, labelled LSD
(Least Significant Digit), handles the least significant BCD digits. It produces the sum output
(S 3 S 2 S 1 S 0 , which is the BCD code for the least significant digit of the sum. It also produces
an output carry that is fed as an input carry to the next higher adjacent BCD adder. This BCD
adder produces the sum output (S 7 S 6 S 5 S 4 , which is the BCD code for the second digit of the
sum, and a carry output. This output carry serves as an input carry for the BCD adder representing
the most significant digits. The sum outputs (S 11 S 10 S 9 S 8 represent the BCD code for the MSD of
the sum.
Digital Electronics
Table 7.1 Results in binary and the expected results in BCD using a four-bit binary adder to perform the addition
of two BCD digits.
Decimal sum
Binary sum
BCD sum
K
Z 3
Z 2
Z 1
Z 0
C
S 3
S 2
S 1
S 0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
2
0
0
0
1
0
0
0
0
1
0
3
0
0
0
1
1
0
0
0
1
1
4
0
0
1
0
0
0
0
1
0
0
5
0
0
1
0
1
0
0
1
0
1
6
0
0
1
1
0
0
0
1
1
0
7
0
0
1
1
1
0
0
1
1
1
8
0
1
0
0
0
0
1
0
0
0
9
0
1
0
0
1
0
1
0
0
1
1 0
0
1
0
1
0
1
0
0
0
0
1 1
0
1
0
1
1
1
0
0
0
1
1 2
0
1
1
0
0
1
0
0
1
0
1 3
0
1
1
0
1
1
0
0
1
1
1 4
0
1
1
1
0
1
0
1
0
0
1 5
0
1
1
1
1
1
0
1
0
1
1 6
1
0
0
0
0
1
0
1
1
0
1 7
1
0
0
0
1
1
0
1
1
1
1 8
1
0
0
1
0
1
1
0
0
0
1 9
1
0
0
1
1
1
1
0
0
1
12, 13, 14 and 15. For the remaining two entries corresponding to a decimal sum equal to 10 and
11, a correction is applied for both Z 3 and Z 1 , being ‘1’. While hardware-implementing, 0110 can be
added to the binary sum output with the help of a second four-bit binary adder. The correction logic as
dictated by the Boolean expression (7.17) should ensure that (0110) gets added only when the above
expression is satisfied. Otherwise, the sum output of the first binary adder should be passed on as such
to the final output, which can be accomplished by adding (0000) in the second adder. Figure 7.21
shows the logic arrangement of a BCD adder capable of adding two BCD digits with the help of two
four-bit binary adders and some additional combinational logic.
The BCD adder described in the preceding paragraphs can be used to add two single-digit
BCD numbers only. However, a cascade arrangement of single-digit BCD adder hardware can be
used to perform the addition of multiple-digit BCD numbers. For example, an n-digit BCD adder
would require n such stages in cascade. As an illustration, Fig. 7.22 shows the block diagram of
a circuit for the addition of two three-digit BCD numbers. The first BCD adder, labelled LSD
(Least Significant Digit), handles the least significant BCD digits. It produces the sum output
(S 3 S 2 S 1 S 0 , which is the BCD code for the least significant digit of the sum. It also produces
an output carry that is fed as an input carry to the next higher adjacent BCD adder. This BCD
adder produces the sum output (S 7 S 6 S 5 S 4 , which is the BCD code for the second digit of the
sum, and a carry output. This output carry serves as an input carry for the BCD adder representing
the most significant digits. The sum outputs (S 11 S 10 S 9 S 8 represent the BCD code for the MSD of
the sum.