100
Digital Electronics
E 1
L
L
H
E 2
L
H
X
Operation
Data flow from B to A
Data flow from A to B
Isolation
(b)
Figure 4.42 (continued).
4.12 IEEE/ANSI Standard Symbols
The symbols used thus far in the chapter for representing different types of gate are the ones that are
better known to all of us and have been in use for many years. Each logic gate has a symbol with a
distinct shape. However, for more complex logic devices, e.g. sequential logic devices like flip-flops,
counters, registers or arithmetic circuits, such as adders, subtractors, etc., these symbols do not carry
any useful information. A new set of standard symbols was introduced in 1984 under IEEE/ANSI
Standard 91–1984. The logic symbols given under this standard are being increasingly used now and
have even started appearing in the literature published by manufacturers of digital integrated circuits.
The utility of this new standard will be more evident in the following paragraphs as we go through its
salient features and illustrate them with practical examples.
4.12.1 IEEE/ANSI Standards – Salient Features
This standard uses a rectangular symbol for all devices instead of a different symbol shape for each
device. For instance, all logic gates (OR, AND, NAND, NOR) will be represented by a rectangular
block.
A right triangle is used instead of a bubble to indicate inversion of a logic level. Also, the right
triangle is used to indicate whether a given input or output is active LOW. The absence of a triangle
indicates an active HIGH input or output. As far as logic gates are concerned, a special notation inside
the rectangular block describes the logic relationship between output and inputs. A ‘1’ inside the block
indicates that the device has only one input. An AND operation is expressed by ‘&’, and an OR
operation is expressed by the symbol ‘≥1’. Figure 4.43 shows the ANSI counterparts of various logic
gates. A ‘≥1’ symbol indicates that the output is HIGH when one or more than one input is HIGH.
An ‘&’ symbol indicates that the output is HIGH only when all the inputs are HIGH. The two-input
EX-OR is represented by the symbol ‘=1’ which implies that the output is HIGH only when one of
its inputs is HIGH.
A special dependency notation system is used to indicate how the outputs depend upon the input.
This notation contains almost the entire functional information of the logic device in question. This
will be more clear as we illustrate this new standard with the help of ANSI symbols for some of the
actual devices belonging to the category of flip-flops, counters, etc., in the following chapters. All
those control inputs that control the timing of change in output states as per logic status of inputs are
designated by the letter ‘C’. These are ENABLE inputs in latches or CLOCK inputs in flip-flops.
Most of the digital ICs contain more than one similar function on one chip such as IC 7400 (quad
two-input NAND), IC 7404 (hex inverter), IC 74112 (dual-edge triggered JK flip-flop), IC 7474 (dual
D-type latch), IC 7475 (quad D-type latch) and so on. Those inputs to such ICs that are common to
Digital Electronics
E 1
L
L
H
E 2
L
H
X
Operation
Data flow from B to A
Data flow from A to B
Isolation
(b)
Figure 4.42 (continued).
4.12 IEEE/ANSI Standard Symbols
The symbols used thus far in the chapter for representing different types of gate are the ones that are
better known to all of us and have been in use for many years. Each logic gate has a symbol with a
distinct shape. However, for more complex logic devices, e.g. sequential logic devices like flip-flops,
counters, registers or arithmetic circuits, such as adders, subtractors, etc., these symbols do not carry
any useful information. A new set of standard symbols was introduced in 1984 under IEEE/ANSI
Standard 91–1984. The logic symbols given under this standard are being increasingly used now and
have even started appearing in the literature published by manufacturers of digital integrated circuits.
The utility of this new standard will be more evident in the following paragraphs as we go through its
salient features and illustrate them with practical examples.
4.12.1 IEEE/ANSI Standards – Salient Features
This standard uses a rectangular symbol for all devices instead of a different symbol shape for each
device. For instance, all logic gates (OR, AND, NAND, NOR) will be represented by a rectangular
block.
A right triangle is used instead of a bubble to indicate inversion of a logic level. Also, the right
triangle is used to indicate whether a given input or output is active LOW. The absence of a triangle
indicates an active HIGH input or output. As far as logic gates are concerned, a special notation inside
the rectangular block describes the logic relationship between output and inputs. A ‘1’ inside the block
indicates that the device has only one input. An AND operation is expressed by ‘&’, and an OR
operation is expressed by the symbol ‘≥1’. Figure 4.43 shows the ANSI counterparts of various logic
gates. A ‘≥1’ symbol indicates that the output is HIGH when one or more than one input is HIGH.
An ‘&’ symbol indicates that the output is HIGH only when all the inputs are HIGH. The two-input
EX-OR is represented by the symbol ‘=1’ which implies that the output is HIGH only when one of
its inputs is HIGH.
A special dependency notation system is used to indicate how the outputs depend upon the input.
This notation contains almost the entire functional information of the logic device in question. This
will be more clear as we illustrate this new standard with the help of ANSI symbols for some of the
actual devices belonging to the category of flip-flops, counters, etc., in the following chapters. All
those control inputs that control the timing of change in output states as per logic status of inputs are
designated by the letter ‘C’. These are ENABLE inputs in latches or CLOCK inputs in flip-flops.
Most of the digital ICs contain more than one similar function on one chip such as IC 7400 (quad
two-input NAND), IC 7404 (hex inverter), IC 74112 (dual-edge triggered JK flip-flop), IC 7474 (dual
D-type latch), IC 7475 (quad D-type latch) and so on. Those inputs to such ICs that are common to