Logic Gates and Related Devices
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The output of a two-input EX-NOR gate is a logic ‘1’ when the inputs are like and a logic ‘0’
when they are unlike. In general, the output of a multiple-input EX-NOR logic function is a logic
‘0’ when the number of 1s in the input sequence is odd and a logic ‘1’ when the number of 1s in the
input sequence is even including zero. That is, an all 0s input sequence also produces a logic ‘1’ at
the output.
Example 4.7
Show the logic arrangements for implementing:
(a) a four-input NAND gate using two-input AND gates and NOT gates;
(b) a three-input NAND gate using two-input NAND gates;
(c) a NOT circuit using a two-input NAND gate;
(d) a NOT circuit using a two-input NOR gate;
(e) a NOT circuit using a two-input EX-NOR gate.
Solution
(a) Figure 4.18(a) shows the arrangement. The logic diagram is self-explanatory. The first step is to get
a four-input AND gate using two-input AND gates. The output thus obtained is then complemented
using a NOT circuit as shown.
(b) Figure 4.18(b) shows the arrangement, which is again self-explanatory. The first step is to get a
two-input AND from a two-input NAND. The output of the two-input AND gate and the third
input then feed the inputs of another two-input NAND to get the desired output.
(c) Shorting the inputs of the NAND gives a one-input, one-output NOT circuit. This is because when
all inputs to a NAND are at logic ‘0’ level the output is a logic ‘1’, and when all inputs to a NAND
are at logic ‘1’ level the output is a logic ‘0’. Figure 4.18(c) shows the implementation.
(d) Again, shorting the inputs of a NOR gate gives a NOT circuit. From the truth table of a NOR gate
it is evident that an all 0s input to a NOR gate gives a logic ‘1’ output and an all 1s input gives a
logic ‘0’ output. Figure 4.18(d) shows the implementation.
(e) It is evident from the truth table of a two-input EX-NOR gate that, if one of the inputs is permanently
tied to a logic ‘0’ level and the other input is treated as the input, then it behaves as a NOT circuit
between input and output [Fig. 4.18(e)]. When the input is a logic ‘0’, the two inputs become 00,
which produces a logic ‘1’ at the output. When the input is at logic ‘1’ level, a 01 input produces
a logic ‘0’ at the output.
Example 4.8
How do you implement a three-input EX-NOR function using only two-input EX-NOR gates?
Solution
Figure 4.19 shows the arrangement. The first two EX-NOR gates implement a two-input EX-OR
gate using two-input EX-NOR gates. The second EX-NOR gate here has been wired as a NOT
circuit. The output of the second gate and the third input are fed to the two inputs of the third
EX-NOR gate.
81
The output of a two-input EX-NOR gate is a logic ‘1’ when the inputs are like and a logic ‘0’
when they are unlike. In general, the output of a multiple-input EX-NOR logic function is a logic
‘0’ when the number of 1s in the input sequence is odd and a logic ‘1’ when the number of 1s in the
input sequence is even including zero. That is, an all 0s input sequence also produces a logic ‘1’ at
the output.
Example 4.7
Show the logic arrangements for implementing:
(a) a four-input NAND gate using two-input AND gates and NOT gates;
(b) a three-input NAND gate using two-input NAND gates;
(c) a NOT circuit using a two-input NAND gate;
(d) a NOT circuit using a two-input NOR gate;
(e) a NOT circuit using a two-input EX-NOR gate.
Solution
(a) Figure 4.18(a) shows the arrangement. The logic diagram is self-explanatory. The first step is to get
a four-input AND gate using two-input AND gates. The output thus obtained is then complemented
using a NOT circuit as shown.
(b) Figure 4.18(b) shows the arrangement, which is again self-explanatory. The first step is to get a
two-input AND from a two-input NAND. The output of the two-input AND gate and the third
input then feed the inputs of another two-input NAND to get the desired output.
(c) Shorting the inputs of the NAND gives a one-input, one-output NOT circuit. This is because when
all inputs to a NAND are at logic ‘0’ level the output is a logic ‘1’, and when all inputs to a NAND
are at logic ‘1’ level the output is a logic ‘0’. Figure 4.18(c) shows the implementation.
(d) Again, shorting the inputs of a NOR gate gives a NOT circuit. From the truth table of a NOR gate
it is evident that an all 0s input to a NOR gate gives a logic ‘1’ output and an all 1s input gives a
logic ‘0’ output. Figure 4.18(d) shows the implementation.
(e) It is evident from the truth table of a two-input EX-NOR gate that, if one of the inputs is permanently
tied to a logic ‘0’ level and the other input is treated as the input, then it behaves as a NOT circuit
between input and output [Fig. 4.18(e)]. When the input is a logic ‘0’, the two inputs become 00,
which produces a logic ‘1’ at the output. When the input is at logic ‘1’ level, a 01 input produces
a logic ‘0’ at the output.
Example 4.8
How do you implement a three-input EX-NOR function using only two-input EX-NOR gates?
Solution
Figure 4.19 shows the arrangement. The first two EX-NOR gates implement a two-input EX-OR
gate using two-input EX-NOR gates. The second EX-NOR gate here has been wired as a NOT
circuit. The output of the second gate and the third input are fed to the two inputs of the third
EX-NOR gate.